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可编程逻辑 XAPP440 - Xilinx CPLD的上电性能

Applying power to a standard logic chip, SRAM, or EPROM, usually results in output pinstracking the applied voltage as it rises. Programmable logic attempts to emulate that behavior,but physics forbids perfect emulation, due to the device programmability. It requires care tospecify the pin behavio ...
https://www.eeworm.com/dl/kbcluoji/40065.html
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可编程逻辑 XAPP144 -设计CPLD多电压系统

Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for han ...
https://www.eeworm.com/dl/kbcluoji/40067.html
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可编程逻辑 XAPP380 -利用CoolRunner-II CPLD创建交叉点开关

  This application note provides a functional description of VHDL source code for a N x N DigitalCrosspoint Switch. The code is designed with eight inputs and eight outputs in order to targetthe 128-macrocell CoolRunner™-II CPLD device but can be easily expanded to target higherdensit ...
https://www.eeworm.com/dl/kbcluoji/40074.html
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可编程逻辑 XAPP390 - 利用CoolRunner-II CPLD设计数码相机

  Digital cameras have become increasingly popular over the last few years. Digital imagingtechnology has grown to new markets including cellular phones and PDA devices. With thediverse marketplace, a variety of imaging technology must be available. Imaging technologyhas expanded to include ...
https://www.eeworm.com/dl/kbcluoji/40095.html
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可编程逻辑 基于Xilinx FPGA的双输出DC/DC转换器解决方案

  Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The ...
https://www.eeworm.com/dl/kbcluoji/40111.html
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可编程逻辑 xilinx Zynq-7000 EPP产品简介

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s progr ...
https://www.eeworm.com/dl/kbcluoji/40119.html
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可编程逻辑 PLD对FPGA数据加密

SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others ...
https://www.eeworm.com/dl/kbcluoji/40127.html
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可编程逻辑 State Machine Coding Styles for Synthesis

  本文论述了状态机的verilog编码风格,以及不同编码风格的优缺点,Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concernin ...
https://www.eeworm.com/dl/kbcluoji/40134.html
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可编程逻辑 多层印制板设计基本要领

【摘要】本文结合作者多年的印制板设计经验,着重印制板的电气性能,从印制板稳定性、可靠性方面,来讨论多层印制板设计的基本要求。【关键词】印制电路板;表面贴装器件;高密度互连;通孔【Key words】Printed Circuit Board;Surface Mounting Device;High Density Interface;Via一.概述印制板(PCB-Printed Circuit ...
https://www.eeworm.com/dl/kbcluoji/40325.html
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可编程逻辑 pci e PCB设计规范

This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on b ...
https://www.eeworm.com/dl/kbcluoji/40445.html
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