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GPS编程 The objective of this projectis to design, model and simulate an autocorrelation generator circuit

The objective of this projectis to design, model and simulate an autocorrelation generator circuit using 4-bit LFSR. the register and LFSR will used D flip-flop and some gates. By the autocorrelation concept, there should be 2 same length vectors, for calculating the autocorrelation , we have to des ...
https://www.eeworm.com/dl/693/185211.html
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单片机开发 数字选台收音机 注意: (1)遥控发射芯片用TC9012/TC9243 经常用到的还有UPD6121和LC7461

数字选台收音机 注意: (1)遥控发射芯片用TC9012/TC9243 经常用到的还有UPD6121和LC7461,它们的不同只处在于引导码的时间不同或者数据位的个数不同,接受原理基本一样。将本程序的相关位置修改就可以通用。 系统时钟22.1184MHZ,如果用其他的时钟请将delay.c文件中的定时器装载值修改一下 (2) 键盘检测在VFD程序中, ...
https://www.eeworm.com/dl/648/191842.html
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嵌入式Linux oid led8_test(void) { int i, j, k iic_init() for( ) { for(j=0 j<10 j++) {

oid led8_test(void) { int i, j, k iic_init() for( ) { for(j=0 j<10 j++) { for(i=0 i<8 i++) { k = 9-(i+j)%10 iic_write(0x70, 0x10+i, f_szDigital[k]) } delay(1000) } } }
https://www.eeworm.com/dl/653/206795.html
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串口编程 一个简单的串口文件发送接受程序。可以调节发送延迟。里面的类可以应用在其他的环境下。A simple program that can send a file through a serial port

一个简单的串口文件发送接受程序。可以调节发送延迟。里面的类可以应用在其他的环境下。A simple program that can send a file through a serial port. The delay and other parameters are changable.
https://www.eeworm.com/dl/624/209796.html
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matlab例程 This simple program help you to calculate parameters for a pid controller for first order systems wi

This simple program help you to calculate parameters for a pid controller for first order systems wiith delay using different method: Ziegler Nichols,Cohen coon,IMC...
https://www.eeworm.com/dl/665/219594.html
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其他书籍 Mobile phones are constantly decreasing in size, thereby complicating the acoustical functionality.

Mobile phones are constantly decreasing in size, thereby complicating the acoustical functionality. Signal processing methods can be used to partially mitigate this problem. In this paper we suggest a method which uses multiple spectral subtraction functions and two microphones, introducing only a s ...
https://www.eeworm.com/dl/542/222191.html
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VHDL/FPGA/Verilog This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDR

This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because ...
https://www.eeworm.com/dl/663/226442.html
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其他书籍 The present paper deals with the problem of calculating mean delays in polling systems with either

The present paper deals with the problem of calculating mean delays in polling systems with either exhaustive or gated service. We develop a mean value analysis (MVA) to compute these delay figures. The merits of MVA are in its intrinsic simplicity and its intuitively appealing derivation. As a cons ...
https://www.eeworm.com/dl/542/230185.html
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DSP编程 This example streams input from a ADC source to a DAC. An analog signal is acquired block-by-block

This example streams input from a ADC source to a DAC. An analog signal is acquired block-by-block into SDRAM from the ADC (an AD9244 in this example). The frames are then output with a one-frame delay to the DAC (an AD9744 in this example). In this example, no processing is done on the frames. The ...
https://www.eeworm.com/dl/516/240027.html
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VC书籍 名称:read2543 功能:TLC2543驱动模块 输入参数:port通道号 输出参数:ad转换值 *************************************/

名称:read2543 功能:TLC2543驱动模块 输入参数:port通道号 输出参数:ad转换值 *************************************/ uint read2543(uchar port) { uint ad=0,i CLOCK=0 _CS=0 port<<=4 for(i=0 i<12 i++) { if(D_OUT) ad|=0x01 D_IN=(bit)(port&0x80) CLOCK=1 delay(3) CLOCK=0 delay(3) port<<= ...
https://www.eeworm.com/dl/686/249191.html
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