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其他 完整的一个论坛,安装方法如下: 1、系统环境要求： MySQL4.1以上版本
完整的一个论坛,安装方法如下:
1、系统环境要求：
MySQL4.1以上版本，需配置为支持utf8连接方式
JDK1.5以上版本
Tomcat5.5以上版本
推荐在Windows上运行
2、安装好以上环境后，配置好虚拟目录，比如：配置好后的访问路径为http://localhost:8080/cwbbs/index.jsp
导入setup目录下的数据库文件cwbbs.sql
例：将cwbbs. ...
其他 Artistic Style is a reindenter and reformatter of C, C++, C# and Java source code. When indentin
Artistic Style is a reindenter and reformatter of C, C++, C# and Java source code.
When indenting source code, we as programmers have a tendency to use both spaces and tab characters to create the wanted indentation. Moreover, some editors by default insert spaces instead of tabs when pressing the ...
文章/文档 Project file for MS Visual C++ 6.0. Requires GLUT DLL (www.opengl.org) Adjust program constants in
Project file for MS Visual C++ 6.0.
Requires GLUT DLL (www.opengl.org)
Adjust program constants in Landscape.h and Utility.cpp.
MAPS:
Default map is read from HeghtXXX.raw where XXX is the MAP_SIZE
(as defined in Landscape.h). If this map is not found, the program
attempts to open "Map.ved", a Tre ...
其他书籍 Full compliance with the USB Specification v1.1 and USB CDC v1.1 Support the RS232 Serial interfa
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configur ...
书籍源码 MSP-FET430P410 Demo - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK Description Toggle P5.1 u
MSP-FET430P410 Demo - Timer_A Toggle P5.1, CCR0 Contmode ISR, DCO SMCLK
Description Toggle P5.1 using using software and TA_0 ISR. Toggle rate is
set at 50000 DCO/SMCLK cycles. Default DCO frequency used for TACLK.
Durring the TA_0 ISR P5.1 is toggled and 50000 clock cycles are added to CCR0. TA_ ...
微处理器开发 D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 22
D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger
Description A 32 byte block from 220h-240h is transfered to 240h-260h
using DMA0 in a burst block using software DMAREQ trigger.
After each transfer, source, destination and DMA size are
reset to inital software setting because DMA tran ...
微处理器开发 MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers Description: Demonstrate
MSP-FET430P140 Demo - USART0, SPI Interface to HC165/164 Shift Registers
Description: Demonstrate USART0 in two-way SPI mode. Data are read from
an HC165, and same data written back to the HC164.
ACLK = n/a MCLK = SMCLK = default DCO = UCLK0 = DCO/2
* USART0 control bits are in different SFR s from ...
单片机开发 this directory contains the following: * The acdc algorithm for finding the approximate general
this directory
contains the following:
* The acdc algorithm for finding the
approximate general (non-orthogonal)
joint diagonalizer (in the direct Least Squares sense) of a set of Hermitian matrices.
[acdc.m]
* The acdc algorithm for finding the
same for a set of Symmetric matrices.
[acdc_s ...
单片机开发 Echo a received character, RX ISR used. Normal mode is LPM0. // USART1 RX interrupt triggers TX Ech
Echo a received character, RX ISR used. Normal mode is LPM0.
// USART1 RX interrupt triggers TX Echo.
// Baud rate divider with 1048576hz = 1048576/38400 = ~27.31 (01Bh|03h)
// ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
// //* An external watch crystal between XIN & X ...
数据库系统 SVG动态读取数据库并实时显示出来。该代码以通过后台读取时间实时显示出来
SVG动态读取数据库并实时显示出来。该代码以通过后台读取时间实时显示出来，如果你需要读取数据库，请在Default.aspx中处理即可。