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VHDL/FPGA/Verilog 编写testbench的超好教程
编写testbench的超好教程，网上这种资料比较少。(Kluwer) Writing Testbenches--Functional Verification of HDL Models.pdf
通讯/手机编程 The package contains a Reed-Solomon coding and decoding program, derived partly from Phil Karn/Rob
The package contains a Reed-Solomon coding and decoding program, derived
partly from Phil Karn/Robert Morelos-Zaragoza "new_rs_erasures.c".
In particular the Berlekamp-Massey algorithm has not been modified. New
features compared to "new_rs_erasures.c" are:
- fully parameterized: code parameters ...
系统设计方案 dephi OBD II 技术路线,所谓OBD-II是一个系列的法规
dephi OBD II 技术路线,所谓OBD-II是一个系列的法规，目的是通过检测整个动力总成系统的故障或劣化来减少在用车的排放，排放控制系统是OBD-II的基础。OBD-II同时也提供诊断的标准化，修理及其他相关服务的标准化。当车辆的排放（HC,CO,NOx)由于被检测的零部件/系统的劣化而超出相关标准的1.5倍时，故障指示灯（MIL）必须被 ...
网络 此软件功能强大 It operates in the highly ompetitive UK banking sector against ...barcode reader to reduce h
此软件功能强大 It operates in the highly ompetitive UK banking sector against ...barcode reader to reduce human errors in the ordering process. - The ...co-generation and unit- testing of client and server components of the
其他书籍 Neural network match filter of chirp pulse compression Neural network match filter of chirp pulse co
Neural network match filter of chirp pulse compression Neural network match filter of chirp pulse compression
软件设计/软件工程 Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM RISC processor
Atmel’s AT91SAM7FP105 is a low pincount FingerChip processor based on the 32-bit ARM
RISC processor. It features a on-chip biometric engine performing enrollment verification and
identification, an internal record cache of up to 25 records and a secure command protocol over
USB, SPI, UART. This pro ...
通讯/手机编程 This a very simple baseband simulator for SC-FDMA system. This simulator is part of the upcoming boo
This a very simple baseband simulator for SC-FDMA system. This simulator is part of the upcoming book “Single Carrier FDMA: A New Air Interface for Long Term Evolution” (Wiley, Nov. 2008) which I co-authored with professor David J. Goodman at Polytechnic University.
The purpose of this simulator ...
文章/文档 In the previous article, we presented an approach for capturing similarity between words that was co
In the previous article, we presented an approach for capturing similarity between words that was concerned with the syntactic similarity of two strings. Today we are back to discuss another approach that is more concerned with the meaning of words. Semantic similarity is a confidence score that ref ...
其他 A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation
A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
其他 A code writing by Verilog which can find medium value. With a C file to see the simulation results.
A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.