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其他 The data for supermap.i have other data,if you like ,you can contact me by the QQ.
The data for supermap.i have other data,if you like ,you can contact me by the QQ.
数学计算 nec moment program by fortran
nec moment program by fortran
Java编程 learn jsp step by step 教程将jsp的学习化繁为简
learn jsp step by step 教程将jsp的学习化繁为简,有助于初学者快速入手
VHDL/FPGA/Verilog This an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
This an interpolating by 2 half-band filter with 79 taps (40 none-zero coefficients).
单片机开发 ATmega128具备引导加载支持的用户程序自编程功能(In-Sysytem Programming by On-它提供了一个真正的由MCU本身自动下载和更新
ATmega128具备引导加载支持的用户程序自编程功能(In-Sysytem Programming by On-它提供了一个真正的由MCU本身自动下载和更新
Java书籍 Data Structures & Algorithms in Java by Robert Lafore ISBN: 1571690956 Sams © 1998, 617 pages
Data Structures & Algorithms in Java
by Robert Lafore ISBN: 1571690956
Sams © 1998, 617 pages
Beautifully written and illustrated, this book introduces you to
manipulating data in practical ways using Java examples
汇编语言 Abstract A new intelligent milometer base on a microcontroller can count the sum. By taking full u
Abstract
A new intelligent milometer base on a microcontroller can count the sum. By taking full use of the processor 89s51 and E² PROM (AT24C02) and sensor of magnetism, it can count the sum of fully distance and the course of development.
其他 A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation
A clock writing by Verilog which can count from 00:00 to 23:59. With a C file to see the simulation results. A co-design example of C and Verilog.
其他 A code writing by Verilog which can find medium value. With a C file to see the simulation results.
A code writing by Verilog which can find medium value. With a C file to see the simulation results. A co-design example of C and Verilog.
其他 This is an extension of sign example. You can design your own traffic sign by using Verilog. And the
This is an extension of sign example. You can design your own traffic sign by using Verilog. And the result from Verilog can be seen by the attached C file.