搜索：bit - 虫虫下载站

单片机开发  This a demo illustrating (1) 8-bit CRC check sums, (2) 57600,N,9,1 communications, and (3) RS-422/R

This a demo illustrating (1) 8-bit CRC check sums, (2) 57600,N,9,1 communications, and (3) RS-422/RS-485 communications.

https://www.eeworm.com/dl/648/155848.html

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单片机开发  These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity,

These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.

https://www.eeworm.com/dl/648/155849.html

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单片机开发  此软件包包含了模拟I2C C51程序软件包和ZLG7290的C51程序然后包。软件包的接口界面：（1） bit ISendByte(uchar sla,uchar c) （无子地址）写单

此软件包包含了模拟I2C C51程序软件包和ZLG7290的C51程序然后包。软件包的接口界面：（1） bit ISendByte(uchar sla,uchar c) （无子地址）写单字节数据（现行地址写）（2） bit IRcvByte(uchar sla,uchar *c) （无子地址）读单字节数据（现行地址读）（3） bit ISendStr(uchar sla,uchar suba,uchar *s,uchar ...

https://www.eeworm.com/dl/648/164713.html

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微处理器开发  Samsung s S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontrol

Samsung s S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems. An integrated Ethernet controller, the S3C4510B, is designed for use in managed communication hubs and routers.

https://www.eeworm.com/dl/655/168142.html

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邮电通讯系统  个人认为几个比较实用的VHDL源码之二——Behavioural model of a simple 8-bit CPU

个人认为几个比较实用的VHDL源码之二——Behavioural model of a simple 8-bit CPU

https://www.eeworm.com/dl/690/169726.html

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VHDL/FPGA/Verilog -- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k

-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com. ...

https://www.eeworm.com/dl/663/170598.html

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VHDL/FPGA/Verilog IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at

IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at a rate of -- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100％ synthesizable

https://www.eeworm.com/dl/663/172723.html

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其他  11 bit dsp core data sheet

11 bit dsp core data sheet

https://www.eeworm.com/dl/534/175517.html

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DSP编程  TigerSharc TS201 32-bit floating point FFT routine

TigerSharc TS201 32-bit floating point FFT routine

https://www.eeworm.com/dl/516/178347.html

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DSP编程  TigerSharc TS201 32-bit floating point IIR filter routine.

TigerSharc TS201 32-bit floating point IIR filter routine.

https://www.eeworm.com/dl/516/178349.html

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