搜索：bit - 虫虫下载站

其他  10MS/s USB-2.0 ("high speed") oscilloscope with two 8 bit sampling inputs

10MS/s USB-2.0 ("high speed") oscilloscope with two 8 bit sampling inputs

https://www.eeworm.com/dl/534/451322.html

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驱动编程  This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to

This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance micro-controller solution in small die size. To reduce total system cost, the S3C2410A includes ...

https://www.eeworm.com/dl/618/453220.html

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编辑器/阅读器  bit torrent protocol in pdf

bit torrent protocol in pdf

https://www.eeworm.com/dl/626/453910.html

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其他嵌入式/单片机内容  LCD using 4 bit mode on a s08 (make sure to adjust delay for faster clocks, ie make delay longer)

LCD using 4 bit mode on a s08 (make sure to adjust delay for faster clocks, ie make delay longer)

https://www.eeworm.com/dl/687/455278.html

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VHDL/FPGA/Verilog vhdl source code for 8 bit datapath logic

vhdl source code for 8 bit datapath logic

https://www.eeworm.com/dl/663/457174.html

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数据库系统  Samsung 8-bit machine the realization of the definition and operation of the sample file spaces

Samsung 8-bit machine the realization of the definition and operation of the sample file spaces

https://www.eeworm.com/dl/523/457261.html

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通讯/手机编程  Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read a

Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided. None of this has been tested (yet) with a third-p ...

https://www.eeworm.com/dl/527/457359.html

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加密解密  Consecutive AES core Description of project.. Features - AES encoder - 128/192/256 bit -

Consecutive AES core Description of project.. Features - AES encoder - 128/192/256 bit - AES decoder - 128/192/256 bit Status - Key Expansion added - Encoder added - Decoder added - Documentation added

https://www.eeworm.com/dl/519/457410.html

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加密解密  VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in li

VHDL implementation of the twofish cipher for 128,192 and 256 bit keys. The implementation is in library-like form All needed components up to, including the round/key schedule circuits are implemented, giving the flexibility to be combined in different architectures (iterative, rolled out/pipeline ...

https://www.eeworm.com/dl/519/457412.html

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嵌入式/单片机编程  FEATURES &#8226 16 bit PIPE Spec PCI Express Testbench &#8226 Link training &#8226 Initial Flo

FEATURES &#8226 16 bit PIPE Spec PCI Express Testbench &#8226 Link training &#8226 Initial Flow Control &#8226 Packet Classes for easy to build PHY,DLLP and TLP packets &#8226 DLLP 16 bit CRC and TLP LCRC generation &#8226 Sequence Number generation and checking &#8226 ACK TLP packets &#8226 ...

https://www.eeworm.com/dl/647/457513.html

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