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可编程逻辑 Nios II软件开发人员手册中的缓存和紧耦合存储器部分
        Nios II 软件开发人员手册中的缓存和紧耦合存储器部分
Nios® II embedded processor cores can contain instruction and data caches. This
chapter discusses cache-related issues that you need to consider to guarantee that
your program executes correctly on the ...
可编程逻辑 WP264-在数字视频应用中使用CPLD
 
The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blo ...
可编程逻辑 WP312-Xilinx新一代28nm FPGA技术简介
Xilinx Next Generation 28 nm FPGA Technology Overview
Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. ...
可编程逻辑 WP369可扩展式处理平台-各种嵌入式系统的理想解决方案
WP369可扩展式处理平台-各种嵌入式系统的理想解决方案 ：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-c ...
可编程逻辑 PLD对FPGA数据加密
SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others ...
可编程逻辑 基于FPGA+DSP模式的智能相机设计
针对嵌入式机器视觉系统向独立化、智能化发展的要求，介绍了一种嵌入式视觉系统--智能相机。基于对智能相机体系结构、组成模块和图像采集、传输和处理技术的分析，对国内外的几款智能相机进行比较。综合技术发展现状，提出基于FPGA+DSP模式的硬件平台，并提出智能相机的发展方向。分析结果表明，该系统设计可以实现脱离PC运 ...
可编程逻辑 ref sdr sdram vhdl代码
ref-sdr-sdram-vhdl代码
SDR SDRAM Controller v1.1 readme.txt
This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture.
...
接口技术 ISA(PC104)总线规范
ISA总线概述 ISA总线: (Industry Standard Architecture:工业标准体系结构）是IBM公司为PC/AT电脑而制定的总线标准，为16位体系结构，只能支持16位的I/O设备，数据传输率大约是16MB/S。也称为AT标准。开始时PC机面向个人及办公室，定义了8位的ISA总线结构，对外公开，成为标准（ISO ISA标准）。第三方开发出许多ISA扩充 ...
数学计算 XMDS is a code generator that integrates equations. You write them down in human readable form in a
XMDS is a code generator that integrates equations. You write them down in human readable form in a XML file, and it goes away and writes and compiles a C++ program that integrates those equations as fast as it can possibly be done in your architecture.
加密解密 ava加密扩展即Java Cryptography Extension
ava加密扩展即Java Cryptography Extension，简称JCE。它是Sun的加密服务软件，包含了加密和密匙生成功能。JCE是JCA（Java Cryptography Architecture）的一种扩展。 JCE没有规定具体的加密算法，但提供了一个框架，加密算法的具体实现可以作为服务提供者加入。除了JCE框架之外，JCE软件包还包含了SunJCE服务提供者，其中包 ...