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技术书籍 Algorithms(算法概论)pdf
This book evolved over the past ten years from a set of lecture notes developed while teaching
the undergraduate Algorithms course at Berkeley and U.C. San Diego. Our way of teaching
this course evolved tremendously over these years in a number of directions, partly to address
our students' ...
C/C++语言编程 at24c16 c程序
一个24c16的读写程序（已经调试过）(arens) 
//////////////////////////////////////////////////////////////// //24c16读写驱动程序，FM24C16A-AT24C16中文资料pdf //=-------------------------------------------------------------------------------/*模块调用:读数据:read(unsigned int address)写数据:w ...
开发工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
实用工具 MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register Access Data Memory View and Edit Supports Logic Levels from 1.1V to 3.6V Supports JTAG and 1 ...
可编程逻辑 怎样使用Nios II处理器来构建多处理器系统
怎样使用Nios II处理器来构建多处理器系统
Chapter 1. Creating Multiprocessor Nios II Systems
Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1
Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2
Nios II Multiprocessor System ...
可编程逻辑 《器件封装用户向导》赛灵思产品封装资料
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes a ...
可编程逻辑 XAPP1065 - 利用Spartan-6 FPGA设计扩频时钟发生器
 
Consumer display applications commonly use high-speed LVDS interfaces to transfer videodata. Spread-spectrum clocking can be used to address electromagnetic compatibility (EMC)issues within these consumer devices. This application note uses Spartan®-6 FPGAs togenerate spread-spectrum ...
可编程逻辑 Verilog Coding Style for Efficient Digital Design
 
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All the ...
Internet/网络编程 sheerdns is a master DNS server whose zone records are stored on a One-Record-Per-File bases. Becaus
sheerdns is a master DNS server whose zone records are stored on a One-Record-Per-File bases. Because of this, it is the simplest of any DNS to configure, the easiest to update, and the most efficient for networks that experience a lot of updates (for example master servers for dynamic IP address ra ...
其他 This Unix C code monitors a web server every few minutes by trying to retrieve its home page. It sen
This Unix C code monitors a web server every few minutes by trying to retrieve its home page. It sends you email when it can t connect, and every so often while the server is still down. It sends a final message when it comes back up. If you have email paging, just direct the email to your pager add ...