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单片机编程 一款监视串口和并口使用的小软件.

（Portmon is an application that lets you monitor serial and parallel activity on your local system, or any computer on the network that you can reach via TCP/IP.&nb ...
https://www.eeworm.com/dl/502/31744.html
下载: 56
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教程资料 Xilinx UltraScale：新一代架构满足您的新一代架构需求（EN）

　　中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html 　　Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture 　 　The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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教程资料 Virtex-6 FPGA PCB设计手册

Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...
https://www.eeworm.com/dl/fpga/doc/32592.html
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教程资料 CPLD和FPGA设计介绍

Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system ...
https://www.eeworm.com/dl/fpga/doc/32627.html
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教程资料 PLD对FPGA数据加密

SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others ...
https://www.eeworm.com/dl/fpga/doc/32637.html
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教程资料 CPLD库指南

Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the D ...
https://www.eeworm.com/dl/fpga/doc/32639.html
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教程资料 Virtex-5 GTP Transceiver Wizar

The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standa ...
https://www.eeworm.com/dl/fpga/doc/32709.html
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教程资料 USB接口控制器参考设计,xilinx提供VHDL代码 us

USB接口控制器参考设计,xilinx提供VHDL代码 usb xilinx vhdl ;  This program is free software; you can redistribute it and/or modify ;  it under the terms of the GNU General Public License as published by ;  the Free Software Foundation; either version 2 of the License, or ;  ...
https://www.eeworm.com/dl/fpga/doc/32717.html
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教程资料 ref sdr sdram vhdl代码

ref-sdr-sdram-vhdl代码 SDR SDRAM Controller v1.1 readme.txt This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1. The PLL is targeted at APEX(TM) devices. Please regenerate for your chosen architecture. ...
https://www.eeworm.com/dl/fpga/doc/32718.html
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通信网络 HITECH与电脑的通信协议

1 Communication Protocol (Computer as master)   The communication protocol describes here allows your computer to access 4096 internal registers (W0000-W4095) and 1024 internal relays&n ...
https://www.eeworm.com/dl/564/32771.html
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