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ARM LPC1300系列产品勘误数据手册

On the LPC13xx, programming, erasure and re-programming of the on-chip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UAR ...

https://www.eeworm.com/dl/553/36632.html

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可编程逻辑  使用Nios II软件构建工具

&nbsp;使用Nios II软件构建工具 This chapter describes the Nios&reg; II Software Build Tools (SBT), a set of utilities and scripts that creates and builds embedded C/C++ application projects, user library projects, and board support packages (BSPs). The Nios II SBT supports a repeatable, scriptable, a ...

https://www.eeworm.com/dl/kbcluoji/39385.html

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可编程逻辑  Nios II定制指令用户指南

&nbsp;&nbsp;&nbsp;&nbsp; Nios II定制指令用户指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequen ...

https://www.eeworm.com/dl/kbcluoji/39394.html

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可编程逻辑  Nios II 系列处理器配置选项

&nbsp;&nbsp;&nbsp; Nios II 系列处理器配置选项:This chapter describes the Nios&reg; II Processor parameter editor in Qsys and SOPC Builder. The Nios II Processor parameter editor allows you to specify the processor features for a particular Nios II hardware system. This chapter covers the features of ...

https://www.eeworm.com/dl/kbcluoji/39396.html

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可编程逻辑  XAPP694-从配置PROM读取用户数据

This application note describes how to retrieve user-defined data from Xilinx configurationPROMs (XC18V00 and Platform Flash devices) after the same PROM has configured theFPGA. The method to add user-defined data to the configuration PROM file is also discussed.The reference design described in t ...

https://www.eeworm.com/dl/kbcluoji/40049.html

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可编程逻辑  XAPP452-Spartan-3高级配置架构

This application note provides a detailed description of the Spartan&trade;-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresented that will guide th ...

https://www.eeworm.com/dl/kbcluoji/40052.html

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可编程逻辑  Virtex-6 FPGA PCB设计手册

Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in ...

https://www.eeworm.com/dl/kbcluoji/40076.html

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可编程逻辑  XAPP719 -利用USR_ACCESS寄存器实现PowerPC高速缓存配置

The Virtex&trade;-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC&trade; 405 (PPC405) processor caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving ...

https://www.eeworm.com/dl/kbcluoji/40081.html

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可编程逻辑  XAPP944 - 将Xilinx CoolRunner-II CPLD用作数据流开关

&nbsp; This application note shows how a Xilinx CoolRunnerTM-II CPLD can be used as a simplelogical switch that can quickly and reliably select between different MPEG video sources. Thesource code for the design is available on the Xilinx website, and is linked from the &ldquo;VHDLCode&rdquo; se ...

https://www.eeworm.com/dl/kbcluoji/40092.html

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可编程逻辑  XAPP328-使用CPLD设计MP3播放器

&nbsp; MP3 portable players are the trend in music-listening technology. These players do not includeany mechanical movements, thereby making them ideal for listening to music during any type ofactivity. MP3 is a digital compression technique based on MPEG Layer 3 which stores music ina lot less ...

https://www.eeworm.com/dl/kbcluoji/40098.html

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