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单片机编程 PLC TM卡开发系统汇编程序(ATM8051)
PLC TM卡开发系统汇编程序(ATM8051)
;***************** 定义管脚*************************SCL BIT P1.0SDA BIT P1.1GC BIT P1.2BZ BIT P3.6LEDI BIT P1.4LEDII BIT P1.5OK BIT 20H.1OUT1 BIT P1.3OUT2 BIT P1.0OUT3 BIT P1.1RXD BIT P3.0TXD BIT P3.1PCV BIT P3.2WPC BIT P3.3RPC BIT P3.5LEDR BIT P3.4LEDL BIT P3.6TM B ...
单片机编程 用单片机配置FPGA—PLD设计技巧
用单片机配置FPGA—PLD设计技巧
Configuration/Program Method for Altera Device
Configure the FLEX Device
You can use any Micro-Controller to configure the FLEX device–the main idea is clocking in ONE BITof configuration data per CLOCK–start from the BIT 0􀂄The total Configuration time–e.g. ...
单片机编程 自动检测单片机80C51串行通讯时的波特率
自动检测80C51 串行通讯中的波特率本文介绍一种在80C51 串行通讯应用中自动检测波特率的方法。按照经验,程序起动后所接收到的第1 个字符用于测量波特率。这种方法可以不用设定难于记忆的开关,还可以免去在有关应用中使用多种不同波特率的烦恼。人们可以设想:一种可靠地实现自动波特检测的方法是可能的,它无须严格限制可 ...
DSP编程 TMS320C54x DSP 的cpu和外围设备
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their productsor to discontinue any product or service without notice, and advise customers to obtain the latestversion of relevant information to verify, before placing orders, that information being relied onis curren ...
教程资料 采用TÜV认证的FPGA开发功能安全系统
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development e ...
教程资料 《器件封装用户向导》赛灵思产品封装资料
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes a ...
教程资料 Time Quest笔记-FPGA的开发流程
本文详细介绍了有关FPGA的开发流程,对初学者会有很大的指导作用。
教程资料 wp379 AXI4即插即用IP
In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting ch ...
教程资料 WP151 - Xilinx FPGA的System ACE配置解决方案
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bo ...
教程资料 XAPP228 -Virtex器件内的四端口存储器
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in ...