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测试测量 浅析HDMI CTS v.1.3和兼容测试中的常见问题
为了改进产品性能和兼容性，最新的HDMI compliance test specification (HDMI CTS) V.1.3增加了新的测试内容和定下了更严格的标准。大多数现在递交给HDMI授权测试中心(ATC) 的带有HDMI功能的电器都将按照HDMI CTS V.1.3 来测试。Analog Devices (ADI) 分别在美国的绿堡(Greensboro，NC), 东京, 台湾和北京设立了四家预测试 ...
数值算法/人工智能 This algorithm was developed by Professor Ronald L. Rivest of MIT and can be found presented in seve
This algorithm was developed by Professor Ronald L. Rivest of MIT and can be found presented in several languages. What I provide to you here is a C++ derivative of the original C implementation of Professor Rivets. The library code itself is platform-independant and has been tested in Redhat Linux. ...
Internet/网络编程 The enclosed VB project includes a VB class that implements the Rijndael AES block encryption algori
The enclosed VB project includes a VB class that implements the Rijndael AES block encryption algorithm. The form in the project runs some test data through the class.
Java编程 本程序为StreamTokenizer类的示例
本程序为StreamTokenizer类的示例，对输入的文件test.txt进行令牌化，统计其中的单数和数字数以及符号数
编译器/解释器 名称：C语言词法分析器 功能：1）从C语言源代码文件中提取所有词素 2）检测程序的词法错误
名称：C语言词法分析器 功能：1）从C语言源代码文件中提取所有词素 2）检测程序的词法错误，给出错误行号及提示 3）语法分析器的预备程序 文件：分析器代码（Lex.c）、测试文件（test.c）、状态转换图、可执行程序 输出：错误记录文件、符号表文件、标识符文件 ...
uCOS 1. 本移植也是从网上Download的
1. 本移植也是从网上Download的，稍微做了一下整理. 移植除了OS_CPU.h,OS_CPU_A.s,OS_CPU_C.C 三个函数外 对中断专门用了一个函数OS_int_A.s 按其中的规则 写中断函数即可 2。应用实例为\ArmUCOS\App\test1\test.mcp,在周立功2104的扳子上 的ram中就可直接运行(code＋data<16K), 注意使用了.a库文件 (我习惯这么用) 3. 将所 ...
Linux/Unix编程 项目描述: Env_audit is a program that ferrets out everything it can about the environment. It looks for
项目描述: Env_audit is a program that ferrets out everything it can about the environment. It looks for process IDs, UID, GID, signal masks, umask, priority, file descriptors, and environmental variables. It comes with test configurations for anacron, apache, atd, crond, GDB, inittab, logrotate, PHP ...
STL What s inside :README - this fileINSTALL - installation instructionsstlport - main STLport include d
What s inside :README - this fileINSTALL - installation instructionsstlport - main STLport include directorysrc - source and makefiles for iostreams implementationlib - installation directory for STLport library (if you use STLport iostreams only)test/regression - regression test, using wrapper iost ...
VHDL/FPGA/Verilog 系数为4的扰码生成器
系数为4的扰码生成器，并每四位扰码产生一个触发串并转换的触发信号，可用于4b/5b编码的触发信号。verilog程序，带test程序
嵌入式/单片机编程 D:MyData其它我的文章C51cp1_1 est.uv2 Project File Date: 04/02/2003
D:\MyData\其它\我的文章\C51\c\p1_1\test.uv2 Project File Date: 04/02/2003