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VHDL/FPGA/Verilog This is UART and LCD interface C code Tested on Sparton 3 xilinx FPGA.
This is UART and LCD interface C code Tested on Sparton 3 xilinx FPGA.
VHDL/FPGA/Verilog This is UART Receiver interface C code Tested on Sparton 3 xilinx FPGA.
This is UART Receiver interface C code Tested on Sparton 3 xilinx FPGA.
VHDL/FPGA/Verilog This is UART Transmitter interface C code Tested on Sparton 3 xilinx FPGA.
This is UART Transmitter interface C code Tested on Sparton 3 xilinx FPGA.
VHDL/FPGA/Verilog This is IDEA encryption Algorithm. Tested on Sparton 3 xilinx FPGA.
This is IDEA encryption Algorithm. Tested on Sparton 3 xilinx FPGA.
嵌入式Linux NXP ISP1761 PCI based Device Controller Driver developed and tested on Linux-2.6.9 kernel with x86 P
NXP ISP1761 PCI based Device Controller Driver developed and tested on Linux-2.6.9 kernel with x86 Platform.
其他嵌入式/单片机内容 NT7108 c source code not tested
NT7108 c source code not tested
其他嵌入式/单片机内容 Up down counter for microchip ASM code tested
Up down counter for microchip ASM code tested
VHDL/FPGA/Verilog It was tested on a XESS XCV800 board interfacing to a proprietary device with a TI DSP, exchanging
It was tested on a XESS XCV800 board
interfacing to a proprietary device with a TI DSP, exchanging
PCM streams in both directions.
其他 this file is leverage algorithm written in matlab as m-file and tested in matlab.so anyone can ue th
this file is leverage algorithm written in matlab as m-file and tested in matlab.so anyone can ue this algorithm and any bug can be reported
uCOS编程 嵌入式实时操作系统MicroCOS_II光盘内容.rar
MicroC/OS-II
The Real-Time Kernel
Second Edition
By Jean J. Labrosse
CMP Books, CMP Media LLC
Copyright 2002 by CMP Books
ISBN 1-57820-103-9
CMP Books
CMP Media LLC
1601 West 23rd Street, Suite 200
Lawrence, Kansas 66046
785-841-1631
www.cmpbooks.com
email: books@cmp.com
The programs and applica ...