搜索结果
找到约 79 项符合
SPECIFIED 的查询结果
按分类筛选
- 全部分类
- matlab例程 (9)
- 其他 (7)
- 技术资料 (5)
- 单片机编程 (4)
- Java编程 (4)
- 单片机开发 (4)
- 串口编程 (3)
- 人工智能/神经网络 (3)
- 微处理器开发 (3)
- 其他书籍 (3)
- Linux/Unix编程 (2)
- 压缩解压 (2)
- 通讯/手机编程 (2)
- 通讯编程文档 (2)
- 书籍 (2)
- 模拟电子 (1)
- 测试测量 (1)
- 源码/资料 (1)
- 游戏 (1)
- Symbian (1)
- VHDL/FPGA/Verilog (1)
- 编译器/解释器 (1)
- 电子书籍 (1)
- 书籍源码 (1)
- 嵌入式/单片机编程 (1)
- 操作系统开发 (1)
- 数值算法/人工智能 (1)
- 其他行业 (1)
- 邮电通讯系统 (1)
- 网络 (1)
- DSP编程 (1)
- 软件设计/软件工程 (1)
- 汇编语言 (1)
- GPS编程 (1)
- Jsp/Servlet (1)
- 行业发展研究 (1)
- 源码 (1)
- 电路图 (1)
- 软件 (1)
matlab例程 The aim of this diploma thesis is to implement all compulsory features of the WiMAX OFDM physical l
The aim of this diploma thesis is to implement all compulsory features of
the WiMAX OFDM physical layer specified in IEEE 802.16-2004 in Matlab
Simulink.
网络 DSR-UU is a DSR implementation that runs in Linux and in the ns-2 network simulator. DSR-UU imple
DSR-UU is a DSR implementation that runs in Linux and in the ns-2 network simulator.
DSR-UU implements most of the basic DSR features specified in the DSR
draft (version 10). One big exception is flow extensions.
DSR-UU does NOT use ARP, so do not be surprised if you do not see ARP
traffic. DSR-UU ...
DSP编程 The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families
(hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard
architecture that has one program memory bus and three data memory buses. These processors also ...
软件设计/软件工程 A UML Documentation for an Elevator System：This paper is a PhD project report for the course Distrib
A UML Documentation for an Elevator System：This paper is a PhD project report for the course Distributed Embedded Systems at Carnegie Mellon University. Throughout this course, a distributed real-time system – an elevator control system– is specified, designed, built, and simulated. Object Orient ...
汇编语言 *** *** *** *** *** *** ***** ** Two wire/I2C Bus READ/WRITE Sample Routines of Microchip s ** 2
*** *** *** *** *** *** *****
** Two wire/I2C Bus READ/WRITE Sample Routines of Microchip s
** 24Cxx / 85Cxx serial CMOS EEPROM interfacing to a
** PIC16C54 8-bit CMOS single chip microcomputer
** Revsied Version 2.0 (4/2/92).
**
** Part use = PIC16C54-XT/JW
** Note: 1) All timings are base ...
matlab例程 ABC_FDTD_Die(T) Implements simulation of a Gaussian Pulse over T time steps. ABC are for free spac
ABC_FDTD_Die(T) Implements simulation of a Gaussian Pulse
over T time steps. ABC are for free space. If boundaries are in
the Dielectric medium then the ABC fail. Dielectric medium begin and
end can be specified with the code
matlab例程 ABC_FDTD_Die(T) Implements simulation of a Gaussian Pulse over T time steps. ABC are for free spac
ABC_FDTD_Die(T) Implements simulation of a Gaussian Pulse
over T time steps. ABC are for free space. If boundaries are in
the Dielectric medium then the ABC fail. Dielectric medium begin and
end can be specified with the code
其他书籍 The combinatorial core of the OVSF code assignment problem that arises in UMTS is to assign some no
The combinatorial core of the OVSF code assignment problem
that arises in UMTS is to assign some nodes of a complete binary
tree of height h (the code tree) to n simultaneous connections, such that
no two assigned nodes (codes) are on the same root-to-leaf path. Each
connection requires a code on a ...
Java编程 Reads/writes text as a character stream, buffering characters so as to provide for the efficient rea
Reads/writes text as a character stream, buffering characters so as to provide for the efficient reading/writing of characters, arrays, and lines.
The buffer size may be specified, or the default size may be used. The default is large enough for most purposes.
In general, each read request made of ...
matlab例程 The BNL toolbox is a set of Matlab functions for defining and estimating the parameters of a Bayesi
The BNL toolbox is a set of Matlab functions for defining and estimating the
parameters of a Bayesian network for discrete variables in which the conditional
probability tables are specified by logistic regression models. Logistic regression can be
used to incorporate restrictions on the conditional ...