搜索：One - 虫虫下载站

电路图  HackRF One硬件原理图

 HackRF One， hardware  源代码

https://www.eeworm.com/dl/511049.html

下载: 2

查看: 492

书籍  Data Science Programming All-In-One

Data science is a term that the media has chosen to minimize, obfuscate, and sometimes misuse. It involves a lot more than just data and the science of working with data. Today, the world uses data science in all sorts of ways that you might not know about, which is why you need&nbsp; Data Science P ...

https://www.eeworm.com/dl/522494.html

下载: 1

查看: 71

技术资料  EPLAN Engineering Center One 用户手册

EPLAN EEC ONE的中文版手册，属于eplan的高端应用。

https://www.eeworm.com/dl/833534.html

下载: 2

查看: 4439

行业应用文档  低失真调谐正弦波晶体振荡器的性能，工作及设计介绍（涉及器件EL2082，EL4451）

One can make a low distortion tuneable oscillatorby incorporating an active filter inside an AGC

https://www.eeworm.com/dl/509/10575.html

下载: 68

查看: 1054

资料/手册  DS18B20中文资料

FEATURES Unique 1-Wire interface requires only one port pin for communication Multidrop capability simplifies distributed temperature sensing applications Requires no external components Can be powered from data line. Power supply range is 3.0V to 5.5V Zero standby power required Measur ...

https://www.eeworm.com/dl/541/13760.html

下载: 160

查看: 1119

技术书籍  【经典的天线书籍】Practical Antenna Handbook

·基本信息Practical Antenna Handbook, 4th EditionbyJoseph J.Carr作者 Jeseph J. Carr 美国国防部航空电子(avionics)资深工程师one of the worlds leading and prolific writer and working scientist on electronics and radio, and an

https://www.eeworm.com/dl/537/14668.html

下载: 85

查看: 1131

教程资料  FPGA64的VHDL源代码

VHDL source codes of the FPGA64, a fpga implementation of the C64 computer. Version for the c-one fpga board.

https://www.eeworm.com/dl/fpga/doc/17492.html

下载: 47

查看: 1084

allegro VHDL,Verilog,System verilog比较

&nbsp; 本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...

https://www.eeworm.com/dl/allegro/20125.html

下载: 103

查看: 1092

allegro Verilog编码中的非阻塞性赋值

&nbsp; One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...

https://www.eeworm.com/dl/allegro/20129.html

下载: 70

查看: 1111

模拟电子  模拟IC性能的权衡模拟到数字化设计的挑战

Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). How ...

https://www.eeworm.com/dl/571/20557.html

下载: 172