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技术资料 集成电路CD系列之CD4017
英文描述： Decade Counter/Divider with 10 Decoded Outputs . Divide-by-8 Counter/Divider with 8 Decoded Outputs
中文描述： 十年计数器/ 10解码输出分频器。分频8计数器/ 8解码输出分频器
技术资料 时序逻辑设计原则 (Sequential Logic Design principles)
时序逻辑设计原则 (Sequential Logic Design principles):A sequential logic circuit is one whose outputs depend
其他书籍 The design of control systems involving piezoelectric actuators and sensors requires an accurate kno
The design of control systems involving piezoelectric actuators and sensors requires an accurate knowledge of the transfer functions between the inputs and the outputs of the system.
技术资料 PIC17C42使用PWM输出时,对PWM频率和分辨方面的选择及应用
The PIC17C42 is equipped with two high frequencyPulse Width Modulation (PWM) outputs. In a pulse
技术资料 40175 CMOS四D触发器
The CD40174BC consists of six positive-edge triggered Dtypeflip-flops; the true outputs from eac
技术资料 4024 CMOS 7级二进制计数器
The CD4024BC is a 7-stage ripple-carry binary counter.Buffered outputs are externally availab
技术资料 4022 CMOS 八进制计数器、分频器
The CD4017BC is a 5-stage divide-by-10 Johnson counterwith 10 decoded outputs and a carry out
技术资料 4017 CMOS 十进制计数器、分频器
The CD4017BC is a 5-stage divide-by-10 Johnson counterwith 10 decoded outputs and a carry out
其他 ofdm信道特性 Channel transmission simulator Channel transmission simulator ％ ％ inputs: ％ sig2 - noi
ofdm信道特性
Channel transmission simulator
Channel transmission simulator
％
％ inputs:
％ sig2 - noise variance
％ Mt - number of Tx antennas
％ Mr - number of Rx antennas
％ x - vector of complex input symbols (for MIMO, this is a matrix, where each column
％ is the value of the antenna outputs a ...
技术资料 7447 TTL BCD—7段高有效译码、驱动器
The DM7446A and DM7447A feature active-LOW outputsdesigned for driving common-anode LEDs or i