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嵌入式Linux void Main(void) { sys_init() // Initial 44B0X s Interrupt,Port and UART // user in
void Main(void)
{
sys_init() // Initial 44B0X s Interrupt,Port and UART
// user interface
uart_printf("\n\r Led Test Example\n")
for( )
{
led_test()
}
}
嵌入式Linux void Main(void) { sys_init() // Initial 44B0X s Interrupt,Port and UART wdtim
void Main(void)
{
sys_init() // Initial 44B0X s Interrupt,Port and UART
wdtimer_test() // test start
}
Java编程 本论坛开发环境：jdk1.5+Tomcat5.5.17+sql server2000+Windows 2000 1、支持HTML内容编辑,支持网络贴图与附件上传等,支持多种版面风格. 2、论坛
本论坛开发环境：jdk1.5+Tomcat5.5.17+sql server2000+Windows 2000
1、支持HTML内容编辑,支持网络贴图与附件上传等,支持多种版面风格.
2、论坛是树型框架结构支持二级类别，类别自已可以添加修改。
3、安全稳定，系统采用密码加密二次验证。
4、本论坛设以简洁高效为目标，所以不适合要求功能花俏、插件多样的使用者；
...
文章/文档 This Document provides the High Level Design specification for the Bootloader development and librar
This Document provides the High Level Design specification for the Bootloader development and library porting for ADSP-BF533 based EZ-Kit Lite Board and STAMP Board. This document is meant to be the one of the inputs for the System Test Plan and the overall implementation of the same. This document ...
微处理器开发 arm7系列芯片s3c44b0x的测试程序
arm7系列芯片s3c44b0x的测试程序，共测试开发板用。the test program of arm7 mcu s3c44b0x ,can be used in testing the board.
其他 Input The first line of the input contains a single integer T (1 <= T <= 20), the number of t
Input
The first line of the input contains a single integer T (1 <= T <= 20), the number of test cases. Then T cases follow. The first line of each case contains N, and the second line contains N integers giving the time for each people to cross the river. Each case is preceded by a blank line. Ther ...
邮电通讯系统 OpenSS7 This the fourth public release of the OpenSS7 Master Package. See README in the release for
OpenSS7 This the fourth public release of the OpenSS7 Master Package. See README in the release for a sub-package listing. Most of the sub-packages in the release are production grade for Linux Fast-STREAMS. All existing validation test suites run clean on supported distributions and architectures. ...
VHDL/FPGA/Verilog 我自己写的vhdl程序
我自己写的vhdl程序，内有画图器，ram 和控制ram。还有test bentch。
中间件编程  The purpose of this lab is to introduce the concept of FSMs with a datapath, and to stud
&#65279 The purpose of this lab is to introduce the concept of FSMs with a datapath, and to
study the usage of more complex test benches. Also, we enforce a rudimentary design
methodology by assuming that the students are part of a bigger project, and have no
knowledge of VHDL-implementatio ...
Linux/Unix编程 本程序是MP3的解码程序
本程序是MP3的解码程序，可以用VC编译或者用GNU编译，可以运行在PC机上。
本程可以MP3文件解压为WAV文件
TEST 中的代码可以播放WAV文件
有兴趣的朋友可以把这段mp3程序移植到开发板上，这样就可以用开发板播放MP3了。