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可编程逻辑 Xilinx FPGA集成电路的动态老化试验
3 FPGA设计流程
完整的FPGA 设计流程包括逻辑电路设计输入、功能仿真、综合及时序分析、实现、加载配置、调试。FPGA 配置就是将特定的应用程序设计按FPGA设计流程转化为数据位流加载到FPGA 的内部存储器中，实现特定逻辑功能的过程。由于FPGA 电路的内部存储器都是基于RAM 工艺的，所以当FPGA电路电源掉电后， ...
可编程逻辑 XAPP144 -设计CPLD多电压系统
Today’s digital systems combine a myriad of chips with different voltage configurations.Designers must interface 2.5V processors with 3.3V memories—both RAM and ROM—as wellas 5V buses and multiple peripheral chips. Each chip has specific power supply needs. CPLDsare ideal for han ...
测试测量 XAPP713 -Virtex-4 RocketIO误码率测试器
 
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in t ...
仿真技术 H-JTAG调试软件下载
ARM通讯
H-JTAG 是一款简单易用的的调试代理软件，功能和流行的MULTI-ICE 类似。H-JTAG 包括两个工具软件：H-JTAG SERVER 和H-FLASHER。其中，H-JTAG SERVER 实现调试代理的功能，而H-FLASHER则实现了FLASH 烧写的功能。H-JTAG 的基本结构如下图1-1所示。 H-JTAG支持所有基于ARM7 和ARM9的芯片的调试，并且支持大 ...
Internet/网络编程 XMail is an Internet and intranet mail server featuring an SMTP server, POP3 server, finger server,
XMail is an Internet and intranet mail server featuring an SMTP server, POP3 server, finger server, multiple domains, no need for users to have a real system account, SMTP relay checking, RBL/RSS/ORBS/DUL and custom ( IP based and address based ) spam protection, SMTP authentication ( PLAIN LOGIN CR ...
书籍源码 来自《VC6.0可视化编程》的源码
来自《VC6.0可视化编程》的源码，适用于初学者。 这是第一章，关于multi windows 的代码
微处理器开发 linux下的gdbserver源码
linux下的gdbserver源码，供multi-ice调试ARM处理器
软件设计/软件工程 The practice of enterprise application development has benefited from the emergence of many new enab
The practice of enterprise application development has benefited from the emergence of many new enabling technologies. Multi-tiered object-oriented platforms, such as Java and .NET, have become commonplace.
matlab例程 This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel.
This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel. The adaptive receiver block is modified from the LMS adaptive filter block in DSP Blockset. For DS-SS signal reception, the adaptive filter needs to have multi-rate operation. The input sample rate i ...