搜索结果

·详细说明：双音多频（DTMF）信号发生器的使用源程序，vc 编写，与《双音多频（DTMF）接收器的使用源程序》联合用- The double sound multi- frequencies (DTMF) the signal generating device use source program, the vc compilation, (DTMF) Receiver Use Source p

·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling ver

·详细说明：双音多频的DTMF信号编码程序，产生DTMF信号进行编码。- The double sound multi- frequencies DTMF signal coded program, produces the DTMF signal to carry on the code.

  This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...

  本文简单讨论并总结了VHDL、Verilog，System verilog 这三中语言的各自特点和区别As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers ...

  One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...

Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures， follow the prompts trainers can locate the fault source and confirm the type to accomplis ...

With more and more multi-frequency clocks being used in today's chips, especially in the communications field, it is often necessary to switch the source of a clock line while the chip is running.

A complete design for a data acquisition card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Tur ...

  This document presents design techniques and reference circuits that power Virtex™-4 FXRocketIO™ multi-gigabit transceivers (MGTs) operating at data rates below 3.125 Gb/s.When using multiple transceivers, it is sometimes preferred to power them from a switchingpower supply. H ...