搜索结果

找到约 250 项符合 MEAN-shift 的查询结果

其他 A) 实现虚拟存储B) 实现对文件的按名存取C) 实现对文件的按内容存取D) 实现对文件的 高速输入输出(17) 分页显示当前文件 ... A) 执行SPLIB B) 执行SPDOS C) 装载拼音模

A) 实现虚拟存储B) 实现对文件的按名存取C) 实现对文件的按内容存取D) 实现对文件的 高速输入输出(17) 分页显示当前文件 ... A) 执行SPLIB B) 执行SPDOS C) 装载拼音模块D) 装载五笔字型输入模块(32) 在汉字输入状态下,按下Shift+a组合键后,输入了__。 ...
https://www.eeworm.com/dl/534/136493.html
下载: 180
查看: 1067

其他 A.执行SPLIB B.执行SPDOS C.装载拼音模块D.装载五笔字型输入模块32.在汉字输入状态下

A.执行SPLIB B.执行SPDOS C.装载拼音模块D.装载五笔字型输入模块32.在汉字输入状态下, 按下Shift+A组合键后,输入了_______。 ... A.按原代码方式B.按指定字体C.按标准方式D. 按分栏方式41.FoxBASE启动后,在圆点"."提示符下,执行命令文件MAIN. ...
https://www.eeworm.com/dl/534/136494.html
下载: 50
查看: 1119

通讯编程文档 The goal with this project was to make it possible for almost any mobile-phone to use ICQ and be abl

The goal with this project was to make it possible for almost any mobile-phone to use ICQ and be able to communicate with other users! One other goal with this project was to lower the GPRS-traffic in the phone and make the ICQ-ing cheaper. A third goal was to make this service as easy to log-in t ...
https://www.eeworm.com/dl/646/138432.html
下载: 174
查看: 1106

VHDL/FPGA/Verilog vhdl程序源代码

vhdl程序源代码,包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等
https://www.eeworm.com/dl/663/143688.html
下载: 23
查看: 1220

Delphi/CppBuilder DELPHI basicCtrl+NUM 直接将光标跳到NUM处

DELPHI basicCtrl+NUM 直接将光标跳到NUM处,NUM是用Ctrl+Shift+NUM设置的标号。 NUM不能用小键盘。 Ctrl+Home 将光标移至文件头。 Ctrl+End 将光标移至文件尾。 Ctrl+B Buffer List窗口。 Ctrl+I 同Tab键。 Ctrl+M 同Enter键。 Ctrl+N 同Enter键,但光标位置保持不变。 Ctrl+T 删除光标右边的一个单词。 Ctrl+Y 删除光标所 ...
https://www.eeworm.com/dl/664/147749.html
下载: 63
查看: 1061

人工智能/神经网络 bayeserr - Computes the Bayesian risk for optimal classifier. % bayescln - Classifier based on Baye

bayeserr - Computes the Bayesian risk for optimal classifier. % bayescln - Classifier based on Bayes decision rule for Gaussians. % bayesnd - Discrim. function, dichotomy, max aposteriori probability. % bhattach - Bhattacharya s upper limit of mean class. error. % pbayescln - Plots discriminat f ...
https://www.eeworm.com/dl/650/164019.html
下载: 87
查看: 1049

邮电通讯系统 This design is a universal register which can be used as a straightforward storage register, a bi-di

This design is a universal register which can be used as a straightforward storage register, a bi-directional shift register, an up counter and a down counter.
https://www.eeworm.com/dl/690/169725.html
下载: 187
查看: 1131

VHDL/FPGA/Verilog -- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k

-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com. ...
https://www.eeworm.com/dl/663/170598.html
下载: 186
查看: 1068

VHDL/FPGA/Verilog 波形发生器

波形发生器,带TESTBENCH, 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn
https://www.eeworm.com/dl/663/170599.html
下载: 200
查看: 1019

单片机开发 MODE_Switch1Processing multi-interrupt request needs to set the priority of these interrupt requests

MODE_Switch1Processing multi-interrupt request needs to set the priority of these interrupt requests. The IRQ flags of the 7 interrupt are controlled by the interrupt event occurring. But the IRQ flag set doesn t mean the system to execute the interrupt vector. The IRQ flags can be triggered by the ...
https://www.eeworm.com/dl/648/184633.html
下载: 72
查看: 1079