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单片机编程 Atmel AT89C系列单片机电路板设计指南
Designing Boards with Atmel AT89C51,AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test.
Recent improvements in chips and testers have made it possible for the tester to begin taking over the role tradi-tionally assigned to the PROM program-mer. Instead of having a PROM pro- g ...
单片机编程 Designing Boards with Atmel AT
Designing Boards with Atmel AT89C51, AT89C52, AT89C1051, and AT89C2051 for Writing Flash at In-Circuit Test:Recent improvements in chips andtesters have made it possible for thetester to begin taking over the role traditionallyassigned to the PROM programmer.Instead of having a PROM programmerwrite ...
教程资料 XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接
XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接 
The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and ...
可编程逻辑 XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接
XAPP520将符合2.5V和3.3V I/O标准的7系列FPGA高性能I/O Bank进行连接 
The I/Os in Xilinx® 7 series FPGAs are classified as either high range (HR) or high performance (HP) banks. HR I/O banks can be operated from 1.2V to 3.3V, whereas HP I/O banks are optimized for operation between 1.2V and ...
单片机开发 This example program shows how to configure and use the A/D Converter of the following microcontroll
This example program shows how to configure and use the A/D Converter of the following microcontroller:
STMicroelectronics ST10F166
After configuring the A/D, the program reads the A/D result and outputs the converted value using the serial port.
To run this program...
Build the project (Project ...
其他书籍 关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
...
技术资料 基于STM32单片机的窨井探测仪设计
设计以STM32F103单片机为核心控制,以压电式电声型超声波换能器为逻辑控制的系统方案,包括单片机系统主控制电路、超声波换能器发射电路、软件程序编写以及测试结果信号分析等,测试结果证明达到误差要求。A system scheme was designed, which took STM32F103 microcontroller as the core control and the piezoelectric ele ...
技术资料 CPLD于数字电路中的应用
可编程逻辑器件PLD(Programmable Logic De-vice)是一种数字电路，它可以由用户来进行编程和进行配置，利用它可以解决不同的逻辑设计问题。PLD由基本逻辑门电路、触发器以及内部连接电路构成，利用软件和硬件(编程器)可以对其进行编程，从而实现特定的逻辑功能。可编程逻辑器件自20世纪70年代初期以来经历了从PROM，PLA，PAL ...
技术资料 JoydriveHarness培训手册
Joydrive Harness是洛中科技自主研发的电子电气系统线束设计自动化工具，覆盖线束电路设计及生产安装工艺设计流程，支持系统线束（电缆网）及设备线束的辅助设计，适用于航天、航空、船舶等军工领域及车辆、通信设备、电子系统、大型机械等民用领域。
Joydrive Harness由Logic、Harness、Factory、Analysis、Manager等 ...
技术资料 DEI 1016 ARINC 429 Transceiver
The DEI 1016 provides an interface between a standard avionics type serial digital data bus and a 16-bit-wide
digital data bus. The interface circuit consists of a single channel transmitter with an 8X32 bit buffer, two inde-
pendent receive channels, and a host programmable control register to se ...