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HDFDUMP and BRFDUMP are utility programs developed for use with MISR data files. HDFDUMP will extract data from a MISR file in the HDF-EOS grid format (MISR Level 1B2 and Level 2 files) and writes unformatted binary files. BRFDUMP calculates radiances and bidirectional reflectance factors (BRF) f ...

自己写的是用于所有VC开发平台和linux平台软件开发的trace功能函数。可自定module,evel, 系统时间开关，trace开关，trace level开关，输出log 到文件，trace 存储文件的大小。。。

The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device鈥檚 cascadable feature allows up to four devices to share a common two-wire bus. The device is optimized for use in many industrial and c ...

Abstract. The main aim of this research is to improve communication between student and teacher by using the developing mobile information technologies. Implementing such technologies in education may help to develop learning environments to share the knowledge among students and increase their moti ...

For a programming language, Fortran has been around a long time. It was one of the first widely used 鈥渉igh-level鈥?languages, as well as the first programming language to be standardized. It is still the premier language for scientific and engineering computing applications. The purpose of this ha ...

The future satellite communication systems are re- quired to support the higher transmission data rate for providing the multimedia services by employing the e铿僣ient modulation method such as multi-level QAM.

The purpose of this project is to explore the issues and implementation of a multiple instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second level cache, and maintain coherence at the L1 cache w ...

ecos RTOS 原理介绍和应用开发The design philosophy of eCos was to augment an open-source RTOS (which meant no per-unit royalties) with source-level con?guration tools that would enable embedded developers to scale their RTOS from hundreds of bytes to hundreds of kilobytes without needing to manu- all ...

The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL ...

Face Recognition Library ======================== Advanced face recognition DLL using two functions : Train and Recognize. Uses neural net back propogation alogorithm with more AI tools added for imaging optimization. Library works great even for a low resolution web cam image and requires the user ...