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软件工程 The DSPLIB is a collection of 39 high-level optimized DSP functions for the TMS320C64x device. This

The DSPLIB is a collection of 39 high-level optimized DSP functions for the TMS320C64x device. This source code library includes C-callable functions (ANSI-C language compatible) for general signal processing math and vector functions.
https://www.eeworm.com/dl/540/355176.html
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其他 The MAX481E, MAX483E, MAX485E, MAX487E–MAX491E, and MAX1487E are low-power transceivers for RS-485

The MAX481E, MAX483E, MAX485E, MAX487E–MAX491E, and MAX1487E are low-power transceivers for RS-485 and RS-422 communications in harsh environments. Each driver output and receiver input is protected against ±15kV electrostatic discharge (ESD) shocks, without latchup. These parts contain one driver ...
https://www.eeworm.com/dl/534/358029.html
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单片机开发 TL062/TL064 MOTOROLA开发的low power JFET input operational amplifiers

TL062/TL064 MOTOROLA开发的low power JFET input operational amplifiers
https://www.eeworm.com/dl/648/358281.html
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通讯/手机编程 John Wiley 的书 Rf Technologies For Low Power Wireless Communications

John Wiley 的书 Rf Technologies For Low Power Wireless Communications,低功耗通信的射频技术,非常有意义的一本书
https://www.eeworm.com/dl/527/358733.html
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通讯/手机编程 iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control

iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- po ...
https://www.eeworm.com/dl/527/360684.html
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其他书籍 A Low-Power ASIC Implementation of 2Mbps Antenna-Rake Combiner for WCDMA with MRC and LMS Capabiliti

A Low-Power ASIC Implementation of 2Mbps Antenna-Rake Combiner for WCDMA with MRC and LMS Capabilities.pdf
https://www.eeworm.com/dl/542/362063.html
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其他 Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note

Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
https://www.eeworm.com/dl/534/373584.html
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VHDL/FPGA/Verilog ADPLL of high level phase locked loop

ADPLL of high level phase locked loop
https://www.eeworm.com/dl/663/374918.html
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matlab例程 MATLAB is a high-level language for technical computing which is often used by engineers to help the

MATLAB is a high-level language for technical computing which is often used by engineers to help them design systems or analyse a system’s behaviour.
https://www.eeworm.com/dl/665/375046.html
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其他 Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理

Newnes.Digital.Signal.Processing.System.Level.Design.Using.LabVIEW.Jun.2005.eBook-DDU labview信号处理教材。
https://www.eeworm.com/dl/534/375318.html
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