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https://www.eeworm.com/dl/879265.html 技术资料

EMC Design Guide for PCB.pdf

资料->【B】电子技术->【B6】品质管理->【0】工艺质量（可靠性、电磁兼容、抗干扰、WDT、品管）->【EMC、电磁兼容】->EMC Design Guide for PCB.pdf
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https://www.eeworm.com/dl/879635.html 技术资料

SystemVerilog for Design

·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling ver
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https://www.eeworm.com/dl/999085.html 技术资料

Intel Platform DT Design Guideline

Intel Haswell Platform Design Guideline for Desk Top
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https://www.eeworm.com/soft/383.html 精品软件

XILINX ISE DESIGN SUITE 14.7

Xilinx ISE Design Suite是利用新技术来降低总设计成本的电子设计套件软件，并且实现了比任何其它 PLD 解决方案更高的性能。
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https://www.eeworm.com/dl/684/134224.html 软件设计/软件工程

Good Code Document,this is a C++ design help document,is good ,help design program

Good Code Document,this is a C++ design help document,is good ,help design program
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https://www.eeworm.com/dl/688/264470.html MySQL数据库

DBDesigner 4 is a database design system that integrates database design, modelling, creation and ma

DBDesigner 4 is a database design system that integrates database design, modelling, creation and maintenance into a single, seamless environment
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https://www.eeworm.com/dl/655/399007.html 微处理器开发

Design of Integrated Circuits for Optical Communications deals with the design of high-speed integra

Design of Integrated Circuits for Optical Communications deals with the design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader from basic concepts to advanced topics, ...
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https://www.eeworm.com/dl/663/449183.html VHDL/FPGA/Verilog

Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design docu

Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.
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https://www.eeworm.com/dl/702/379392.html Ajax

ajax patterns 这是关于ajax设计模式方面的原代码

ajax patterns 这是关于ajax设计模式方面的原代码
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https://www.eeworm.com/dl/663/172724.html VHDL/FPGA/Verilog

-- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can r

-- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft license at
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