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20世纪90年代中期，因使用ASIC实现芯片组受到启发，萌生应该将完整计算机所有不同的功能块一 次直接集成于一颗硅片上的想法。这种芯片，初始起名叫System on a Chip(SoC)，直译的中文名是 系统级芯片

This paper presents several low-latency mixed-timing FIFO (first-in–first-out) interfaces designs that interface systems on a chip working at different speeds. The connected systems can be either synchronous or asynchronous. The designs are then adapted to work between systems with very long interc ...

This design package includes reference materials for creating a USB - PS/2 combination mouse that auto-detects the interface and configures itself to operate on the appropriate bus. Documentation docs - Designing a low cost CY7C63723 combination mouse.pdf - application note for this design - sch ...

方便的utf8，unicode，ansi互相转换的模板实现，范型编成，在VC++，GCC，Inter C++中测试通过,结合dnc_utf8.rar来使用

使TypeList的生成线性化，高级范型编程技术，请参考《C++程序设计新思维》，此程序不必像书中说的那样需要宏来生成TypeList，注意此程序依赖dnc_pp.rar.在VC++，GCC，Inter C++中测试通过

高级范型编程，一个小型的type traits实现，不依赖于任何程序，编译速度极快，提供了日常所需要的常用范型程序组件。在VC++，GCC，Inter C++中测试通过

Ｃ＋＋程序设计新思维中提到的TypeList 实现品，只是没有了构造TypeList的宏，可以配合dnc_typeline.rar使用，摆脱一定要用难用的宏才能创建TypeList的命运，在VC++，GCC，Inter C++中测试通过

Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on ma ...

一个verilog语言描写的同步fifo,包括:Fifo using declared registers for storage和Fifo using (model of) standard memory chip for storage.两种方式,包含testbench

x5045是一个带串行E2PROM的CPU监控芯片，本程序采用标准的C51程序编写。- X5045 is a belt serial E2PROM CPU monitoring chip, this procedure uses the standard the C51 programming