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VHDL/FPGA/Verilog Serial UART open source core. The design is engineered for use as a stand alone chip or for use with
Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication is very common that almost every machine understands it.Also, for OCRP-1, we nee ...
微处理器开发 User manual for S3C6400X chip.
User manual for S3C6400X chip.
微处理器开发 Schematic of the SMDK6400 Evaluation Board for the S3C6400 chip.
Schematic of the SMDK6400 Evaluation Board for the S3C6400 chip.
微处理器开发 User s manual of the SC32442B chip from Samsung.
User s manual of the SC32442B chip from Samsung.
微处理器开发 Datasheet for K4M511633C chip. It s a 8M x 16Bit x 4 Banks Mobile SDRAM from Samsung.
Datasheet for K4M511633C chip. It s a 8M x 16Bit x 4 Banks Mobile SDRAM from Samsung.
软件设计/软件工程 THE fundamental implementation of inter- nationalization. The examples are based on a Windows Forms
THE fundamental implementation of inter-
nationalization. The examples are based on a Windows Forms application using
Visual Studio 2005 and the .NET Framework 2.0
软件设计/软件工程 SINGLE CHIP SET-TOP BOX DECODER WITH ENHANCED AUDIO
SINGLE CHIP SET-TOP BOX DECODER WITH ENHANCED
AUDIO
通讯编程文档 inter process communication tutorial
inter process communication tutorial
系统设计方案 TFT LCD Single Chip Driver240RGBx320 Resolution and 262K color
TFT LCD Single Chip Driver240RGBx320 Resolution and 262K color
其他书籍 Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book descr
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, formal
verification and static timing analysis, using the Synopsys suite of tools.