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VHDL/FPGA/Verilog VHDL是由美国国防部为描述电子电路所开发的一种语言
VHDL是由美国国防部为描述电子电路所开发的一种语言，其全称为(Very High Speed Integrated Circuit) Hardware Description Language。 与另外一门硬件描述语言Verilog HDL相比，VHDL更善于描述高层的一些设计，包括系统级（算法、数据通路、控制）和行为级（寄存器传输级），而且VHDL具有设计重用、大型设计能力、可读性强 ...
其他 The C++ Editor is a text editor for C++ programmers. The editor have color syntax highlighting. Ed
The C++ Editor is a text editor for C++ programmers. The editor have
color syntax highlighting. Editor s main purpose is to edit source
code files outside the IDE (Integrated Development Environment) with
multiple opened copies of program, when programmer needs to find,
replace or compare source ...
微处理器开发 200-MHz ARM920T Processor • 16-kbyte Instruction Cache • 16-kbyte Data Cache •
200-MHz ARM920T Processor
&#8226 16-kbyte Instruction Cache
&#8226 16-kbyte Data Cache
&#8226 Linux&reg , Microsoft&reg Windows&reg CE-enabled MMU
&#8226 100-MHz System Bus
&#8226 MaverickCrunch&#8482 Math Engine
&#8226 Floating Point, Integer, and Signal Processing
Instructions
&#8226 Opt ...
3G开发 论文IEEE上的
论文IEEE上的，zigbee的关于实时定位系统的研究Zigbee - Research into integrated Real-Time Location Systems.pdf，zigbee的关于实时定位系统的研究
通讯编程文档 this is a document about radio frequency identification RFID, this was a project ,i have done last y
this is a document about radio frequency identification RFID, this was a project ,i have done last year ,actually this technology is a very inpotrtant one due to its relation with newest technologies , like GPS , or the miniturization of integrated circuits ,and that is described in chapter 3 . chap ...
嵌入式/单片机编程 David Vernon is the Coordinator of the European Network for the Advancement of Artificial Cognitive
David Vernon is the Coordinator of the European Network for the Advancement of Artificial Cognitive Systems and he is a Visiting Professor of Cognitive Systems at the University of Genoa. He is also a member of the management team of the RobotCub integrated working on the development of open-source ...
电子书籍 The goal of this thesis is the development of traffic engineering rules for cellular packet radio n
The goal of this thesis is the development of traffic engineering rules for cellular packet
radio networks based on GPRS and EDGE. They are based on traffic models for typical
mobile applications. Load generators, representing these traffic models, are developed
and integrated into a simulation envi ...
文件格式 The STi7105 uses state of the art process technology to provide an ultra low-cost, fully featured
The STi7105 uses state of the art process
technology to provide an ultra low-cost, fully
featured HD AVC decoder IC. It is a highly
integrated system-on-chip suitable for STB markets across all networks (cable/satellite/DTT/x-
DSL/IP) worldwide
嵌入式/单片机编程 An Overview of Smart Card Security. The smart card, an intelligent token, is a credit card sized
An Overview of Smart Card Security.
The smart card, an intelligent token, is a credit card sized plastic card embedded with an integrated circuit chip. It provides not only memory capacity, but computational capability as well. The self-containment of smart card makes it resistant to attack as it d ...
DSP编程 The LabVIEW DSP Test Toolkit for TI DSP uses LabVIEW to automate TI’s Code Composer Studio™ (
The LabVIEW DSP Test Toolkit for TI DSP uses LabVIEW to automate
TI’s Code Composer Studio™ (CCS) Integrated Development
Environment (IDE) so you can create test systems for DSP target code.