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可编程逻辑 XAPP380 -利用CoolRunner-II CPLD创建交叉点开关
 
This application note provides a functional description of VHDL source code for a N x N DigitalCrosspoint Switch. The code is designed with eight inputs and eight outputs in order to targetthe 128-macrocell CoolRunner™-II CPLD device but can be easily expanded to target higherdensit ...
可编程逻辑 XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存储器桥
 
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Spec ...
可编程逻辑 UG157 LogiCORE IP Initiator/Ta
UG157 - LogiCORE™ IP Initiator/Target v3.1 for PCI™ 入门指南
仿真技术 基于xPC和CVI的实时仿真系统设计实现
针对在xPC平台下开发的实时仿真系统依赖于MATLAB环境，影响其在工程实践中推广应用的问题，提出了一种基于xPC Target和LabWindows/CVI的实时仿真系统设计方法。采用该方法设计的仿真系统，实现了独立的宿主机程序，同时利用LabWindows/CVI虚拟仪器技术开发出了主控台仿真软件。经仿真验证，该系统具备仿真步长1 ms，数据通 ...
测试测量 徕卡测量系统应用文集--TCA2003
TCA2003是徕卡测量系统于1998年推出市场的世界上第一台带有目标自动照准功能(Automatic Target Recognition)的全自动全站仪，又被称作“测量机器人”，其代表世界大地测量仪器领先水平的0.5"测角精度和1mm+1×10－6Dm测距精度使其成为世界各国高精度大地测量应用中的一款经典仪器。
从1999年进入中国市场开始，TCA2003先后 ...
单片机开发 外部SRAM与C8051F000接口 Copyright (C) 2000 CYGNAL INTEGRATED PRODUCTS, INC. All rights reserved. FILE N
外部SRAM与C8051F000接口 Copyright (C) 2000 CYGNAL INTEGRATED PRODUCTS, INC. All rights reserved. FILE NAME : Sram.ASM TARGET MCU : C8051F000 DESCRIPTION : External Sram read/write verification routine for IDT 71V124SA.
微处理器开发 860最小系统的bsp
860最小系统的bsp，使用tornado2.0编译，需要解压在\tornado\target\config目录下使用。
其他 Pocket 1945 is a classic shooter inspired by the classic 1942 game. The game is written in C# target
Pocket 1945 is a classic shooter inspired by the classic 1942 game. The game is written in C# targeting the .NET Compact Framework. This article is my first submission to Code Project and is my contribution to ongoing .NET CF competition.
微处理器开发 The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) de
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and ...
单片机开发 This example demonstrates how to erase, write, and read the on-chip 640-byte EEPROM Data Memory of t
This example demonstrates how to erase, write, and read the on-chip 640-byte EEPROM Data Memory of the Analog Devices ADuC812, ADuC814, ADuC816, and ADuC824 devivces. This example includes a µ Vision2 Project with a target for each supported device.