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系统设计方案 1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analy

1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis 2. fpga implemention of a median filter 3. fpga implementation of digital filters 4.hardware acceleration of edge detection algorithm on fpgas 5.implementation and evaluation of image processing a ...
https://www.eeworm.com/dl/678/423411.html
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软件工程 Designing Embedded Hardware Ebook By John Catsoulis If you want to build your own embedded system

Designing Embedded Hardware Ebook By John Catsoulis If you want to build your own embedded system, or tweak an existing one, this invaluable book gives you the understanding and practical skills you need.
https://www.eeworm.com/dl/540/424563.html
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数学计算 CalcExpress is an interpreter for quick and easy evaluation of mathematical expressions. It is a sm

CalcExpress is an interpreter for quick and easy evaluation of mathematical expressions. It is a smart tool easy in use. Supports 5 operators, parenthesis, 18 mathematical functions and user-defined variables
https://www.eeworm.com/dl/641/424789.html
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VHDL/FPGA/Verilog I2C core code in Hardware descrption language so as enable a cpld/fpga to be programmed for specific

I2C core code in Hardware descrption language so as enable a cpld/fpga to be programmed for specific customized applications of our requirment & make the pcb work to meet the application requirements.
https://www.eeworm.com/dl/663/426593.html
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VHDL/FPGA/Verilog This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with

This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outp ...
https://www.eeworm.com/dl/663/430383.html
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其他 This is a simple MIPS processor datapath written in VERILOG hardware language. You can see the signa

This is a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.
https://www.eeworm.com/dl/534/430912.html
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软件设计/软件工程 SIM300DZ is the Hardware Description of Version 2.04 of the SIMCARD GSM Module. This datasheet corre

SIM300DZ is the Hardware Description of Version 2.04 of the SIMCARD GSM Module. This datasheet corrects some problems that others have.
https://www.eeworm.com/dl/684/431251.html
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行业发展研究 The use of hardware description languages (HDLs) is becoming increasingly common for designing and

The use of hardware description languages (HDLs) is becoming increasingly common for designing and verifying FPGA designs. Behavior level description not only increases design productivity, but also provides unique advantages for design verification. The most dominant HDLs today are Verilog and VHDL ...
https://www.eeworm.com/dl/692/431778.html
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Linux/Unix编程 I CAME BACK I BRING LOTS OF THING TO U ALL THIS TUTORIAL FOR DAY3 SESSION SERIES OF UNIX HARDWARE AN

I CAME BACK I BRING LOTS OF THING TO U ALL THIS TUTORIAL FOR DAY3 SESSION SERIES OF UNIX HARDWARE AND NETWORKING CONCEPTS
https://www.eeworm.com/dl/619/432335.html
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通讯编程文档 evaluation KIT for PLC communication

evaluation KIT for PLC communication
https://www.eeworm.com/dl/646/432900.html
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