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Designing withProgrammable Logicin an Analog WorldProgrammable logic devices revolutionizeddigital design over 25 years ago,promising designers a blank chip todesign literally any function and programit in the field. PLDs can be low-logicdensity devices that use nonvolatilesea-of-gates cells calle ...

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Solutions Analog Altera FPGAs

可编程逻辑  Analog Solutions for Xilinx FPGAs

Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calle ...

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Solutions Analog Xilinx FPGAs

可编程逻辑  基于FPGA实时电话计费器的设计

实时电话计费系统是企业、事业单位信息管理的一个重要组成部分。介绍了一种用FPGA器件实现电话计费系统的方法，并给出了设计框图和详细设计过程。设计采用Veriiog_HDL硬件语言。

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FPGA 电话计费器

可编程逻辑  XAPP122 - Spartan-XL FPGA的Express配置

Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan&trade;-XL family. The Express mode signals and their associated timing are defined.The steps of Express con ...

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Spartan-XL Express XAPP FPGA

可编程逻辑  XAPP719 -利用USR_ACCESS寄存器实现PowerPC高速缓存配置

The Virtex&trade;-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC&trade; 405 (PPC405) processor caches and/or other data into the FPGA after the FPGAhas been configured, thus achieving ...

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USR_ACCESS PowerPC XAPP 719

可编程逻辑  PLD、FPGA优秀设计的十条戒律

PLD、FPGA优秀设计的十条戒律,　该文浅显易懂的介绍了一个优秀设计必须考虑的问题，给出了设计方法和建议。仔细阅读和消化本文，对提高PLD/FPGA设计水平大有裨益

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FPGA PLD

测试测量  确定任务参数的温度记录仪

Logger iButton devices have gained a lot of popularity with researchers. Although free evaluation software is easy to use and welldocumented, the choices and inputs that need to be made can sometimes be challenging. This application note explains technicalterms that are common with temperature log ...

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参数温度记录仪

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可编程逻辑  基于Quartus II免费IP核的双端口RAM设计实例

可编程逻辑  基于FPGA的运动估计设计

可编程逻辑  Analog Solutions for Altera FPGAs