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教程资料 CPLD库指南

Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the D ...
https://www.eeworm.com/dl/fpga/doc/32639.html
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嵌入式综合 WP276 -可编程的开发和测试

We all know the benefits of using FieldProgrammable Gate Arrays (FPGAs): no NRE, nominimum order quantities, and faster time-tomarket.In an ideal world, designs would never needto be changed because of design errors, but we allknow that sometimes this is necessary.
https://www.eeworm.com/dl/566/35805.html
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嵌入式综合 XAPP996-双处理器参考设计套件

This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few differentdual-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiproce ...
https://www.eeworm.com/dl/566/35817.html
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嵌入式综合 VxWorks6.x中的ML403嵌入式开发平台

The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers ...
https://www.eeworm.com/dl/566/35821.html
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可编程逻辑 采用TÜV认证的FPGA开发功能安全系统

This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development e ...
https://www.eeworm.com/dl/kbcluoji/39304.html
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可编程逻辑 怎样使用Nios II处理器来构建多处理器系统

怎样使用Nios II处理器来构建多处理器系统 Chapter 1. Creating Multiprocessor Nios II Systems Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1 Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2 Nios II Multiprocessor System ...
https://www.eeworm.com/dl/kbcluoji/39388.html
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可编程逻辑 Employing a Single-Chip Transceiver in Femtocell Base-Station Applications

Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective s ...
https://www.eeworm.com/dl/kbcluoji/39952.html
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可编程逻辑 wp379 AXI4即插即用IP

In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting ch ...
https://www.eeworm.com/dl/kbcluoji/40023.html
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可编程逻辑 XAPP424 - 嵌入式JTAG ACE播放器

This application note contains a reference design consisting of HDL IP and Xilinx AdvancedConfiguration Environment (ACE) software utilities that give designers great flexibility increating in-system programming (ISP) solutions. In-system programming support allowsdesigners to revise existing desi ...
https://www.eeworm.com/dl/kbcluoji/40053.html
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可编程逻辑 XAPP098 - Spartan FPGA低成本、高效率串行配置

This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration ci ...
https://www.eeworm.com/dl/kbcluoji/40059.html
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