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matlab例程 this is file used for design of three phase current controller
this is file used for design of three phase current controller
Java书籍 Data Structures and Algorithms with Object-Oriented Design Patterns in Java Bruno R. Preiss B.A.S
Data Structures and Algorithms
with Object-Oriented Design Patterns in Java
Bruno R. Preiss
B.A.Sc., M.A.Sc., Ph.D., P.Eng.
Associate Professor
Department of Electrical and Computer Engineering
University of Waterloo, Waterloo, Canada
通讯/手机编程 In this project we analyze and design the minimum mean-square error (MMSE) multiuser receiver for un
In this project we analyze and design the minimum mean-square error (MMSE) multiuser receiver for uniformly quantized synchronous code division multiple access (CDMA) signals in additive white Gaussian noise (AWGN) channels.This project is mainly based on the representation of uniform quantizer by ...
VHDL/FPGA/Verilog a divider design based on verilog language
a divider design based on verilog language
微处理器开发 handshake checker and it is used in the design of USB or other material ,it is a simple one on the a
handshake checker and it is used in the design of USB or other material ,it is a simple one on the acadimic level
其他书籍 Digital design book for FPGA
Digital design book for FPGA
系统设计方案 Clock for any purpose of use by any design
Clock for any purpose of use by any design
VHDL/FPGA/Verilog Serial UART open source core. The design is engineered for use as a stand alone chip or for use with
Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication is very common that almost every machine understands it.Also, for OCRP-1, we nee ...
单片机开发 TCP/IP , design by msp430 , very good
TCP/IP , design by msp430 , very good
其他书籍 Practical design techniques for sensor signal condition
Practical design techniques for sensor signal condition