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可编程逻辑 Nios II定制指令用户指南

     Nios II定制指令用户指南:With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequen ...
https://www.eeworm.com/dl/kbcluoji/39394.html
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可编程逻辑 XAPP694-从配置PROM读取用户数据

This application note describes how to retrieve user-defined data from Xilinx configurationPROMs (XC18V00 and Platform Flash devices) after the same PROM has configured theFPGA. The method to add user-defined data to the configuration PROM file is also discussed.The reference design described in t ...
https://www.eeworm.com/dl/kbcluoji/40049.html
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可编程逻辑 XAPP452-Spartan-3高级配置架构

This application note provides a detailed description of the Spartan™-3 configurationarchitecture. It explains the composition of the bitstream file and how this bitstream isinterpreted by the configuration logic to program the part. Additionally, a methodology ispresented that will guide th ...
https://www.eeworm.com/dl/kbcluoji/40052.html
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可编程逻辑 XAPP122 - Spartan-XL FPGA的Express配置

Express Mode uses an 8-bit wide bus path for fast configuration of Xilinx FPGAs. Thisapplication note provides information on how to perform Express configuration specifically forthe Spartan™-XL family. The Express mode signals and their associated timing are defined.The steps of Express con ...
https://www.eeworm.com/dl/kbcluoji/40057.html
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可编程逻辑 XAPP098 - Spartan FPGA低成本、高效率串行配置

This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration ci ...
https://www.eeworm.com/dl/kbcluoji/40059.html
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可编程逻辑 WP264-在数字视频应用中使用CPLD

  The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blo ...
https://www.eeworm.com/dl/kbcluoji/40077.html
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可编程逻辑 xilinx Zynq-7000 EPP产品简介

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s progr ...
https://www.eeworm.com/dl/kbcluoji/40119.html
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可编程逻辑 US Navy VHDL Modelling Guide

  This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
https://www.eeworm.com/dl/kbcluoji/40131.html
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电子书籍 This hands-on, one-stop guide delivers the focused, streamlined direction you need to get your Web s

This hands-on, one-stop guide delivers the focused, streamlined direction you need to get your Web solutions up and running quickly. Zero in on key ASP.NET configuration details and techniques using quick-reference tables, lists, coding and more.
https://www.eeworm.com/dl/cadence/ebook/103530.html
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Java编程 Java/J2EE application framework based on [Expert One-on-One J2EE Design and Development] by Rod John

Java/J2EE application framework based on [Expert One-on-One J2EE Design and Development] by Rod Johnson. Includes JavaBeans-based configuration, an AOP framework, declarative transaction management, JDBC and Hibernate support, and a web MVC framework.
https://www.eeworm.com/dl/633/108165.html
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