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可编程逻辑 Employing a Single-Chip Transceiver in Femtocell Base-Station Applications
Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective s ...
Java书籍 JBoss, one of the leading java Open Source groups, integrates and develops these services for a full
JBoss, one of the leading java Open Source groups, integrates and develops these services for a full J2EE-based implementation. JBoss provides JBossServer, the basic EJB container, and Java Manage Preface 18 Great Events of the Twentieth Centuryment Extension (JMX) infrastructure. It also provides J ...
微处理器开发 200-MHz ARM920T Processor • 16-kbyte Instruction Cache • 16-kbyte Data Cache •
200-MHz ARM920T Processor
&#8226 16-kbyte Instruction Cache
&#8226 16-kbyte Data Cache
&#8226 Linux&reg , Microsoft&reg Windows&reg CE-enabled MMU
&#8226 100-MHz System Bus
&#8226 MaverickCrunch&#8482 Math Engine
&#8226 Floating Point, Integer, and Signal Processing
Instructions
&#8226 Opt ...
技术资料 eXpressDSP软件技术
eXpressDSP软件技术 强大集成的开发工具 规模可伸缩实时软件 基础
• C55x compiler optimizes • Pre-emptive scheduler Code coded assembly
Composer DSP/BIOS • Real-time analysis
• More than 10,000
TM Stu ...
allegro US Navy VHDL Modelling Guide
 
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
可编程逻辑 US Navy VHDL Modelling Guide
 
This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...
其他书籍 关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
...
技术资料 Stm32编译函数库
The STM32F10x Standard Peripherals Library is a complete package, consisting of device drivers for all of the standard device peripherals, for STM32 Value line(Medium and Low), Connectivity line, XL-, High-, Medium- and Low- Density Devices 32-bit Flash microcontrollers.
This library is a firmware p ...
技术资料 PW2162_2.0.pdf规格书下载
The PW2162 is a fully integrated, high– efficiency 2A synchronous rectified step-down converter.The PW2162 operates at high efficiency over a wide output current load range. This device offerstwo operation modes, PWM control and PFM Mode switching control, which allows a high efficiencyover the wid ...
技术资料 typec 接口转换芯片规格书，typec to hdmi+vga+pd+audio
typec 接口转换芯片 ， HDMI,VGA,PD，audio 单芯片解决方案。EP9632G is a Display Port Receiver with HDMI/VGA/Audio outputs and embedded MCU. The chip
accepts Display Port (DP) input and converts the input video stream into HDMI output and VGA output.
Besides, the input audio stream is converted to Audi ...