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单片机编程 PCA9517 Level translating I2C-

The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of t ...
https://www.eeworm.com/dl/502/30990.html
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单片机编程 PCA9518 Expandable 5channel I2

The PCA9518 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both thedata (SDA) and the clock (SCL) lines, thus enabling virtuallyunlimited buses of ...
https://www.eeworm.com/dl/502/30996.html
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单片机编程 PCA9519 4channel level transla

The PCA9519 is a 4-channel level translating I2C-bus/SMBus repeater that enables theprocessor low voltage 2-wire serial bus to interface with standard I2C-bus or SMBus I/O.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of ...
https://www.eeworm.com/dl/502/31002.html
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单片机编程 Clocking Options for Stellaris

The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after t ...
https://www.eeworm.com/dl/502/31067.html
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单片机编程 Input Signal Rise and Fall Tim

All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, howeve ...
https://www.eeworm.com/dl/502/31376.html
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单片机编程 介绍C16x系列微控制器的输入信号升降时序图及特性

All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, howeve ...
https://www.eeworm.com/dl/502/31379.html
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单片机编程 单片机外围线路设计

当拿到一张CASE单时,首先得确定的是能用什么母体才能实现此功能,然后才能展开对外围硬件电路的设计,因此首先得了解每个母体的基本功能及特点,下面大至的介绍一下本公司常用的IC:单芯片解决方案• SN8P1900 系列–  高精度 16-Bit  模数转换器–  可编程运算放大器 (PGIA)•  信号 ...
https://www.eeworm.com/dl/502/31398.html
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单片机编程 用单片机配置FPGA—PLD设计技巧

用单片机配置FPGA—PLD设计技巧 Configuration/Program Method for Altera Device Configure the FLEX Device You can use any Micro-Controller to configure the FLEX device–the main idea is clocking in ONE BITof configuration data per CLOCK–start from the BIT 0􀂄The total Configuration time–e.g. ...
https://www.eeworm.com/dl/502/31633.html
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教程资料 Xilinx UltraScale:新一代架构满足您的新一代架构需求(EN)

  中文版详情浏览:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class ...
https://www.eeworm.com/dl/fpga/doc/32075.html
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教程资料 XAPP806 -决定DDR反馈时钟的最佳DCM相移

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microproces ...
https://www.eeworm.com/dl/fpga/doc/32600.html
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