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Linux/Unix编程 VLSi KL partitioning Algorithm based programme for 100 nodes. It s dynamic progremme so by changing
VLSi KL partitioning Algorithm based programme for 100 nodes.
It s dynamic progremme so by changing the MAX value we can change the number of nodes in the network.
电子书籍 一篇关于7128CPLD的英文介绍
一篇关于7128CPLD的英文介绍,里面包含了44脚到100引脚各个型号的MAX系列cpld
VHDL/FPGA/Verilog 数字频率计是一种用来测试周期性变化信号工作频率的装置。其原理是在规定的单位时间(闸门时间)内
数字频率计是一种用来测试周期性变化信号工作频率的装置。其原理是在规定的单位时间(闸门时间)内,记录输入的脉冲的个数。我们可以通过改变记录脉冲的闸门时间来切换测频量程。本文利用EDA技术中的Max+plusⅡ作为开发工具,设计了基于FPGA的8位十进制频率计,并下载到在系统可编程实验板的EPF10K20TC144-4器件中测试实现了 ...
matlab例程 1)LQG design of an unmanned helicopter 2) LQR control of an unmanned helicopter 3) speed torque ch
1)LQG design of an unmanned helicopter
2) LQR control of an unmanned helicopter
3) speed torque characteristics of Induction machine
matlab例程 4 16 64 QAM plots for simulated and theoretical results for OFDM system under a standard Rayleigh ch
4 16 64 QAM plots for simulated and theoretical results for OFDM system under a standard Rayleigh channel
VC书籍 “This book is a tremendous achievement. You owe it to yourself to have a copy on your shelf. The ch
“This book is a tremendous achievement. You owe it to yourself to
have a copy on your shelf. The chapter on iostreams is the most
comprehensive and understandable treatment of that subject I’ve
seen to date.”
驱动编程 This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to
This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to provide
hand-held devices and general applications with cost-effective, low-power, and high-performance micro-controller
solution in small die size. To reduce total system cost, the S3C2410A includes ...
编译器/解释器 生成Trick文件工具 1.Open command line 2.input tricktest Usage: TrickTest -f -o -i -f source mpeg2 fil
生成Trick文件工具
1.Open command line
2.input tricktest
Usage: TrickTest -f -o -i
-f source mpeg2 file to trick
-o trick output directory
-i output file id
-m max coding error, default 0
-b max bitrate for trick generate, default 0 mean no limit
-s trick buffer block size, must be n*188
-l lo ...
通讯/手机编程 introduce the reader to the fundamentals of modelling, analysis, and simulation of mobile fading ch
introduce the reader to the fundamentals of modelling, analysis,
and simulation of mobile fading channels
VHDL/FPGA/Verilog 系统介绍EDA技术的发展概述
系统介绍EDA技术的发展概述,相关概念,VHDL语言、MAX+PULS、QUARTUS的设计方法。