搜索：BE - 虫虫下载站

多媒体处理  Goertzel算法是DTMF信号检测的核心

·详细说明：Goertzel算法是DTMF信号检测的核心，它利用二极点的IIR滤波器计算离散傅立叶变换值，快速有效的提取输入信号的频谱信息。-Goertzel algorithm is the DTMF signal examination core, it uses two extremes the IIR filter computations to be separated Fourier t ...

https://www.eeworm.com/dl/521/14530.html

下载: 185

查看: 1367

多媒体处理  用于语音识别：基于HMM模型(用C++语言编写)

·详细说明：用于语音识别，基于HMM模型，用C++语言编写。可用连续语音识别-It is based on HMM Model and developed with C++ which could be used to continuous speech recognition.

https://www.eeworm.com/dl/521/14747.html

下载: 29

查看: 1132

多媒体处理  GSM的编解码C源码(使用Intel的IPP包)堪称效率最高

·详细说明：GSM的编解码C源码(使用Intel的IPP包)堪称效率最高。-GSM arranges decodes the c source code (to use intel the ipp package) to may be called the efficiency to be highest文件列表:   GSMAMR   ......\api   ...

https://www.eeworm.com/dl/521/15038.html

下载: 57

查看: 1158

多媒体处理  MPEG4实现的软件代码

·详细说明：MPEG4实现的软件代码，极具参考价值-code of software to implement mpeg4, valuable to be refrenced 文件列表:   mpeg-4 tts   ..........\source   ..........\......\AboutDlg.cpp   ..........\...

https://www.eeworm.com/dl/521/15196.html

下载: 142

查看: 1081

教程资料  This is a document for CYCLONE Develop Kits type LJ-FN300 FPGANIOS. Wish this would help you to find

This is a document for CYCLONE Develop Kits type LJ-FN300 FPGANIOS. Wish this would help you to find what kits can be select to use.

https://www.eeworm.com/dl/fpga/doc/17999.html

下载: 135

查看: 1113

allegro Verilog Coding Style for Efficient Digital Design

&nbsp; In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All the ...

https://www.eeworm.com/dl/allegro/20110.html

下载: 168

查看: 1137

allegro US Navy VHDL Modelling Guide

&nbsp; This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the deve ...

https://www.eeworm.com/dl/allegro/20112.html

下载: 162

查看: 1130

allegro Verilog编码中的非阻塞性赋值

&nbsp; One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assi ...

https://www.eeworm.com/dl/allegro/20129.html

下载: 70

查看: 1111

模拟电子  电台维修模拟训练系统设计方法研究

Methods for designing a maintenance simulation training system for certain kind of radio are introduced. Fault modeling method is used to establish the fault database. The system sets up some typical failures， follow the prompts trainers can locate the fault source and confirm the type to accomplis ...

https://www.eeworm.com/dl/571/20200.html

下载: 74

查看: 1031

模拟电子  如何设计升压转换器MAX17597峰值电流模式控制器

Abstract: This application note describes how to design boost converters using the MAX17597 peakcurrent-mode controller. Boost converters can be operated in discontinuous conduction mode (DCM) orcontinuous conduction mode (CCM). This operating mode can affect the component choices, stress levelin ...

https://www.eeworm.com/dl/571/20668.html

下载: 43

查看: 1042

搜索结果

按分类筛选