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DSP编程  基于DSP的ATV-ATT中控系统设计

设计一种应用于某全地形ATV车载武器装置中的中控系统，该系统设计是以TMS320F2812型DSP为核心，采用模块化设计思想，对其硬件部分进行系统设计，能够完成对武器装置高低、回转方向的运动控制，实现静止或行进状态中对目标物的测距，自动瞄准以及按既定发射模式发射弹丸和各项安全性能检测等功能。通过编制相应的软件，对其 ...

https://www.eeworm.com/dl/516/31999.html

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DSP编程  MATLAB与PSpice数据接口技术

摘要瞬态仿真领域的许多工作需要获得可视化数据, 仿真电路不能将输出参数绘制成图形时研究工作将受到很大影响. 而权威电路仿真软件PSpice 在这个方面不尽如人意. 本文提出了一种有效的解决办法: 通过MATLAB 编程搭建一个PSpice 与MATLAB 的数据接口,使PSpice输出数据文件可以导入到MATLAB中绘制图形. 这令我们能够很方便 ...

https://www.eeworm.com/dl/516/32034.html

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教程资料  使用Artix-7 FPGA 降低您的系统功耗与成本

As businesses and consumers expect more fromportable electronics, the FPGA industry has beencompelled to re-think how it serves these low-power,cost-sensitive markets. Application classes like

https://www.eeworm.com/dl/fpga/doc/32167.html

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This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This T&Uuml;V-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development e ...

https://www.eeworm.com/dl/fpga/doc/32285.html

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教程资料  Create a 1-Wire Master with Xilinx PicoBlaze

Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wir ...

https://www.eeworm.com/dl/fpga/doc/32310.html

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教程资料  ALTERA的FPGA_的AS、PS和Jtag配置模式区别

altera

https://www.eeworm.com/dl/fpga/doc/32409.html

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教程资料  Employing a Single-Chip Transceiver in Femtocell Base-Station Applications

Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective s ...

https://www.eeworm.com/dl/fpga/doc/32535.html

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教程资料  wp379 AXI4即插即用IP

In the past decade, the size and complexity of manyFPGA designs exceeds the time and resourcesavailable to most design teams, making the use andreuse of Intellectual Property (IP) imperative.However, integrating numerous IP blocks acquiredfrom both internal and external sources can be adaunting ch ...

https://www.eeworm.com/dl/fpga/doc/32564.html

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教程资料  XAPP503-针对Xilinx器件的SVF和XSVF文件格式

This application note provides users with a general understanding of the SVF and XSVF fileformats as they apply to Xilinx devices. Some familiarity with IEEE STD 1149.1 (JTAG) isassumed. For information on using Serial Vector Format (SVF) and Xilinx Serial Vector Format(XSVF) files in embedded pro ...

https://www.eeworm.com/dl/fpga/doc/32577.html

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教程资料  XAPP228 -Virtex器件内的四端口存储器

This application note describes how the existing dual-port block memories in the Spartan&trade;-IIand Virtex&trade; families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in ...

https://www.eeworm.com/dl/fpga/doc/32585.html

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