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教程资料 电子书：Practical FPGA Programming in C
Practical FPGA Programming in C \r\nBy David Pellerin, Scott Thibault \r\nPublisher: Prentice Hall PTR \r\nPub Date: April 22, 2005 \r\nISBN: 0-13-154318-0 \r\nPages: 464 \r\n
教程资料 Building a RISC System in an FPGA
Building a RISC System in an FPGA
教程资料 Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver
教程资料 FPGA in the software radio
FPGA in the software radio
教程资料 Many CAD users dismiss schematic capture as a necessary evil in the process of creating
Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we have always disputed this point of view. With PCB layout now offering\r\nautomation of both component placement and track routing, getting the des
模拟电子 2012TI电子设计大赛——微弱信号检测装置
微弱信号检测装置
四川理工学院 刘鹏飞、梁天德、曾学明
摘要：
本设计以TI的Launch Pad为核心板，采用锁相放大技术设计并制作了一套微弱信号检测装置，用以检测在强噪声背景下已知频率微弱正弦波信号的幅度值，并在液晶屏上数字显示出所测信号相应的幅度值。实验结果显示其抗干扰能力强，测量精度高。
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模拟电子 模拟IC性能的权衡 模拟到数字化设计的挑战
Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). How ...
模拟电子 正确的混合信号设计印刷电路板(PCB)的接地
Abstract: This tutorial discusses proper printed-circuit board (PCB) grounding for mixed-signal designs. Formost applications a simple method without cuts in the ground plane allows for successful PCB layouts withthis kind of IC. We begin this document with the basics: where the current flows. Lat ...
模拟电子 如何设计升压转换器MAX17597峰值电流模式控制器
Abstract: This application note describes how to design boost converters using the MAX17597 peakcurrent-mode controller. Boost converters can be operated in discontinuous conduction mode (DCM) orcontinuous conduction mode (CCM). This operating mode can affect the component choices, stress levelin ...
模拟电子 音频数模转换器DAC抖动的灵敏度分析
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and high-frequenc ...