📄 dsp_boot.lst
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TMS320C54x COFF Assembler Version 3.70 Fri Apr 05 18:42:39 2002
Copyright (c) 1996-2001 Texas Instruments Incorporated
dsp_boot.s54 PAGE 1
1 ;=============================================================================
2 ; Filename: dsp_boot.s54
3 ; Description: This file contains the DSP bootloader.
4 ;
5 ; Copyright (C) 2000 - 2002 Texas Instruments Incorporated
6 ;
7 ; Assumptions: DSP Executable to be bootloaded must be designed to run in
8 ; Microcomputer Mode - MP/MC = 0
9 ;
10 ;=============================================================================
11 .include dsp_boot.inc
12 .mmregs
13
14
15 000000 .sect "intvects"
16 000000 SELF
17 000000 771D STM 0FFA8h, PMST ;Set Overlay and DROM Bits
000001 FFA8
18 000002 F073 B BootLoad
000003 0000'
19
20
21
22 000000 .text
23 000000 BootLoad:
24 ;===== Configure DSP Memory =====
25 ;================================
26 000000 EC63 RPT #100-1 ;Delay - didn't work without this
27 000001 F495 NOP
28 000002 7729 STM 00010h, BSCR ;Clear API Boot Mode
000003 0010
29
30 ;===== Set PMST for Bootload of particular DSP Executable =====
31 000004 7711 STM PMST_VAL, AR1
000005 3804
32 000006 1181 LD *AR1,B ;Save PMST in B for later
33 ;===== If (OVLY == 0) this is a special condition set rest of PMST, but don't
34 ; set OVLY=0 now
35 000007 1081 LD *AR1,A
36 000008 F040 OR #00020h,A ;Make sure OVLY=1
000009 0020
37 00000a 881D STLM A, PMST
38
39 ;===== Let MCU Know we are ready to Bootload =====
40 00000b 7711 STM DSP_READY, AR1 ; DSP_READY address used to tell MCU
00000c 3800
41 ; time to bootload
42 00000d 7681 ST #1, *AR1 ; API boot mode is done.
00000e 0001
43 ; Set *DSP_READY=1
44
45 00000f F4A5 LD 5, ARP ; AR5 used for branch test
46 000010 F495 NOP ; pipeline conflict avoidance
47
48
TMS320C54x COFF Assembler Version 3.70 Fri Apr 05 18:42:39 2002
Copyright (c) 1996-2001 Texas Instruments Incorporated
dsp_boot.s54 PAGE 2
49 ;===== Main Loop - Wait for Command from Host =====
50 ;==================================================
51 000011 XMainLoop:
52 ;===== Check if there is program to load =====
53 000011 7215 MVDM PROG_BUF_READY, AR5 ; Check if there is program data to load
000012 3801
54 000013 F495 NOP ; pipeline conflict avoidance
55 000014 6C85 BANZ XProgLoad, *AR5 ; Second argument unused.
000015 0022'
56 ;===== Check if there is data to load =====
57 000016 7215 MVDM DATA_BUF_READY, AR5 ; Check if there is data to load
000017 3802
58 000018 F495 NOP ; pipeline conflict avoidance
59 000019 6C85 BANZ XDataLoad, *AR5 ; Second argument unused.
00001a 005E'
60 ;===== Check if were done with bootload =====
61 00001b 7215 MVDM COPY_DONE, AR5 ; Check if we're done with bootload
00001c 3803
62 00001d F495 NOP ; pipeline conflict avoidance
63 00001e 6C85 BANZ ProgEnd, *AR5 ; Goto End when all done.
00001f 007E'
64 000020 F073 B XMainLoop ; Stay in this loop until bootload is
000021 0011'
65 ; finished
66
67
68 ;===== Load Program =====
69 ;========================
70 000022 XProgLoad:
71 ;===== AR4->Buffer of Code to be loaded =====
72 000022 7714 STM API_BUF_START, AR4 ; AR4 pointing to source memory
000023 3900
73 ;===== Section Count = Count - 1, Store for repeat instruction to copy code
74 000024 1084 LD *AR4, A ; A = count.
75 000025 F010 SUB #1, A ; RPT instruction takes (n-1) as count.
000026 0001
76 000027 8084 STL A, *AR4 ; Store decremented count back to memory
77 000028 7D94 MVDP *AR4+, #XProgRPT+1 ; Move count into RPT opcode below.
000029 004A'
78
79 ;===== Main Program Loop =====
80 00002a XProgLoop:
81 ;===== Code below assumes that DSP Exec will run in MP/MC = 0
82 ; (i.e., Microcomputer Mode) =====
83 00002a 681D ANDM #0FFBFh, PMST ; Make sure we are in Microcomputer
00002b FFBF
84 ; Mode MP/MC=0
85
86 ;===== if (DestADdr < 0x6000) && (OVLY == 0) Then DestAddr is external
87 ; and requires special loading =====
88
89 ;===== if (DestAddr < 0x6000) Then Check OVLY bit =====
90 00002c 1284 LDU *AR4, A ; A = DestAddr
91 00002d F495 NOP
92 00002e F495 NOP
TMS320C54x COFF Assembler Version 3.70 Fri Apr 05 18:42:39 2002
Copyright (c) 1996-2001 Texas Instruments Incorporated
dsp_boot.s54 PAGE 3
93 00002f F010 SUB #06000h,A ; If DestAddr < 0x6000, drop through
000030 6000
94 000031 F495 NOP
95 000032 F495 NOP
96 000033 F842 BC StoreDestProgAddr,AGEQ ; Otherwise, DestAddr >= 0x6000,
000034 0045'
97 ; take branch
98 ;===== if (OVLY == 0) Then Special Loading Required =====
99 000035 7711 STM PMST_VAL, AR1
000036 3804
100 000037 6181 BITF *AR1, #00020h ; Test Overlay Bit, if not set,
000038 0020
101 ; drop through
102 000039 F495 NOP
103 00003a F495 NOP
104 00003b F830 BC StoreDestProgAddr,TC ; Otherwise, if set OVLY = 1, take branch
00003c 0045'
105
106 ;===== Load This Section of Code via MP mode and DestAddr + 0x8000 =====
107 00003d SpecialProgLoad:
108 00003d 691D ORM #00040h, PMST ; Put DSP in Microprocessor
00003e 0040
109 ; Mode MP/MC = 1
110 00003f F495 NOP
111 000040 F495 NOP
112 000041 6984 ORM #08000h,*AR4 ; Add 0x8000 to DestAddr
000042 8000
113 000043 F495 NOP
114 000044 F495 NOP
115
116 000045 StoreDestProgAddr:
117 ;===== Store Destination Addr for Copy =====
118 000045 7D84 MVDP *AR4, #XProgMVDP+1 ;
000046 004C'
119 ; Move destination adr into opcode below.
120 000047 7D94 MVDP *AR4+, #XProgMVDP+1 ; Move destination adr into opcode below.
000048 004C'
121 000049 XProgRPT:
122 000049 F070 RPT #0FFFFH ; Repeat count times.
00004a FFFF
123 ; (FFFF will be replaced)
124 00004b XProgMVDP:
125 00004b 7D94 MVDP *AR4+, #0 ; Move from source to destination.
00004c 0000
126 ; (note 0 gets overwritten)
127 00004d 1084 LD *AR4, A ; Get next count
128 00004e 8815 STLM A, AR5 ; Store to AR5 for banz test.
129 00004f F010 SUB #1, A ; RPT instruction takes (n-1) as count.
000050 0001
130 000051 8084 STL A, *AR4 ; Store decremented count back to memory
131 000052 7D94 MVDP *AR4+, #XProgRPT+1 ; Move count into RPT opcode below.
000053 004A'
132 000054 F4A5 LD 5, ARP ; ARP = AR5 (used for banz test later)
133 000055 F495 NOP ; Needed to avoid pipeline conflict
134 000056 6C85 BANZ XProgLoop, *AR5 ; Dummy second argument unused
TMS320C54x COFF Assembler Version 3.70 Fri Apr 05 18:42:39 2002
Copyright (c) 1996-2001 Texas Instruments Incorporated
dsp_boot.s54 PAGE 4
000057 002A'
135 000058 7714 STM PROG_BUF_READY, AR4 ; Return Address
000059 3801
136 00005a 7684 ST #0, *AR4 ; Write 0 to PROG status word
00005b 0000
137 ; signaling complete
138 00005c F073 B XMainLoop ; Return to main bootloader loop.
00005d 0011'
139
140 ;===== Load Data =====
141 ;=====================
142 00005e XDataLoad:
143 00005e 7714 STM API_BUF_START, AR4 ; AR4 pointing to source memory
00005f 3900
144 000060 1084 LD *AR4, A ; A = count.
145 000061 F010 SUB #1, A ; RPT instruction takes (n-1) as count.
000062 0001
146 000063 8084 STL A, *AR4 ; Store decremented count back to memory
147 000064 7D94 MVDP *AR4+, #XDataRPT+1 ; Move count into RPT opcode below.
000065 006B'
148 000066 XDataLoop:
149 000066 1094 LD *AR4+, A ; Get destination address
150 000067 8813 STLM A, AR3 ; AR3 points to destination address
151 000068 F495 NOP ; Needed to avoid pipeline conflict
152 000069 F495 NOP ; Needed to avoid pipeline conflict
153 00006a XDataRPT:
154 00006a F070 RPT #0FFFFH ; Repeat count times.
00006b FFFF
155 ; (FFFF will be replaced)
156 00006c E5A9 MVDD *AR4+, *AR3+ ; Move from source to destination.
157 00006d 1084 LD *AR4, A ; Get next count
158 00006e 8815 STLM A, AR5 ; Store to AR5 for banz test.
159 00006f F010 SUB #1, A ; RPT instruction takes (n-1) as count.
000070 0001
160 000071 8084 STL A, *AR4 ; Store decremented count back to memory
161 000072 7D94 MVDP *AR4+, #XDataRPT+1 ; Move count into RPT opcode below.
000073 006B'
162 000074 F4A5 LD 5, ARP ; ARP = AR5 (used for banz test later)
163 000075 F495 NOP ; Needed to avoid pipeline conflict
164 000076 6C85 BANZ XDataLoop, *AR5 ; Dummy second argument unused
000077 0066'
165 000078 7714 STM DATA_BUF_READY, AR4 ; Return Address
000079 3802
166 00007a 7684 ST #0, *AR4 ; Write return value to return address,
00007b 0000
167 ; signa
168 00007c F073 B XMainLoop ; Return to main bootloader loop.
00007d 0011'
169
170 00007e ProgEnd:
171 00007e F073 B 0FF80h
00007f FF80
172
173
174 .end
TMS320C54x COFF Assembler Version 3.70 Fri Apr 05 18:42:39 2002
Copyright (c) 1996-2001 Texas Instruments Incorporated
dsp_boot.s54 PAGE 5
No Assembly Errors, No Assembly Warnings
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