dsp281x_sci.c

许继的2812开发全套驱动程序，很全很实用的.rar

//###########################################################################
//
// FILE:	DSP281x_Sci.c
//
// TITLE:	DSP281x SCI Initialization & Support Functions.
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
//  1.00| 11 Sep 2003 | L.H. | No change since previous version (v.58 Alpha)
//###########################################################################

#include "DSP281x_Device.h"     // DSP281x Headerfile Include File
#include "DSP281x_Examples.h"   // DSP281x Examples Include File

#define CPU_FREQ 	150E6
#define SCI_FREQ 	100E3
#define SCI_PRD 	CPU_FREQ/(SCI_FREQ*8)
//---------------------------------------------------------------------------
// InitSCI: 
//---------------------------------------------------------------------------
// This function initializes the SCI(s) to a known state.
//
void InitSci(void)
{
	// Initialize SCI-A:
	SciaRegs.SCICCR.all = 0x0027;	//1 stop bit,odd parity,8 char bits,idle-line protocol
	SciaRegs.SCICTL1.all = 0x0003;	//enable TX,RX,disable RX ERR INT,SLEEP,TXWAKE
	SciaRegs.SCICTL2.all = 0x0000;	//disable RX/BRKDT INT,TX INT
	SciaRegs.SCIHBAUD = 0x0000;
	SciaRegs.SCILBAUD = 0x00F3;	//Baud Rate=19200 b/s(150MHz SYSCLK)
	SciaRegs.SCICTL1.all = 0x0023;	//Relinquish SCI from Reset
	SciaRegs.SCIPRI.all = 0x0000;
	
	//Initialize SCI FIFO
	SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;	//reset FFTX and hold in reset
	SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;	//reset FFRX and hold in reset
	//SciaRegs.SCIFFTX.all = 0xE040;	//disable TXFIFO interrupt, TXFIFO level is 16 words 
	//SciaRegs.SCIFFRX.all = 0x6061;	//enable RXFIFO interrupt,RXFIFO level is one word
	//SciaRegs.SCIFFCT.all = 0x000F;	//disable auto-baud alignment, delay 15 baud clock cycles		
	//tbd...
 	
	// Initialize SCI-B:
		
	//loop back test mode enable
	ScibRegs.SCICCR.all = 0x0037;	//1 stop bit,odd parity,8 char bits,idle-line protocol
									//Enable loop back mode
	//SciaRegs.SCICCR.all = 0x0027; normal operation
	ScibRegs.SCICTL1.all = 0x0003;	//enable TX,RX,disable RX ERR INT,SLEEP,TXWAKE
	ScibRegs.SCICTL2.all = 0x0000;	//enable RX/BRKDT INT, disable TX INT
	ScibRegs.SCIHBAUD = 0x0000;
	ScibRegs.SCILBAUD = 0x00F3;	//Baud Rate=19200 b/s(150MHz SYSCLK)
	ScibRegs.SCICTL1.all = 0x0023;	//Relinquish SCI from Reset
	ScibRegs.SCIPRI.all = 0x0000;
	
	//Initialize SCI FIFO
	ScibRegs.SCIFFTX.bit.TXFIFOXRESET = 1;	//reset FFTX and hold in reset
	ScibRegs.SCIFFRX.bit.RXFIFORESET = 1;	//reset FFRX and hold in reset
	//ScibRegs.SCIFFTX.all = 0xE040;	//disable TXFIFO interrupt, TXFIFO level is 16 words 
	//ScibRegs.SCIFFRX.all = 0x6061;	//enable RXFIFO interrupt,RXFIFO level is one word
	//ScibRegs.SCIFFCT.all = 0x000F;	//disable auto-baud alignment, delay 15 baud clock cycles	
	//tbd...
}	

/*
interrupt void sciaTxFifoIsr(void)
{   
    
	SciaRegs.SCIFFTX.bit.TXINTCLR=1;	// Clear SCI Interrupt flag
	PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void sciaRxFifoIsr(void)
{   
    
	SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
	SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag
	PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

interrupt void scibTxFifoIsr(void)
{       
    
	ScibRegs.SCIFFTX.bit.TXINTCLR=1;    // Clear Interrupt flag
	PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void scibRxFifoIsr(void)
{
    	                                
	ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;  // Clear Overflow flag
	ScibRegs.SCIFFRX.bit.RXFFINTCLR=1; 	// Clear Interrupt flag
	PieCtrlRegs.PIEACK.all|=0x100;  	// Issue PIE ack
}
*/
void error(void)
{
    asm("     ESTOP0"); // Test failed!! Stop!
    for (;;);
}	
//===========================================================================
// No more.
//===========================================================================