plcore.drc

AVR典型实例.rar

Protel Design System Design Rule Check
PCB File : \plc\PLCORE.PcbDoc
Date     : 2008-3-1
Time     : 21:32:52

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=20mil) (Preferred=10mil) (All)
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=10mil) (All),(All)
Rule Violations :0

Processing Rule : Room plcore (Bounding Region = (11055mil, 1025mil, 13100mil, 3235mil) (InComponentClass('plcore'))
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:01