📄 detect.lst
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306 1 vFreq=VFreq(hFreq, g_wVerticalTotal);//((DWORD)hFreq*1000+(SrcVTotal/2))/SrcVTotal;
307 1
308 1 //======== for interlace mode========
309 1 #if !SOG_ENABLE //for Skypine V sync not stable
310 1 if (msReadByte(BK0_EF_STATUS2)&INTM_B)
311 1 #endif
312 1 {
313 2 SrcFlags|=bInterlaceMode;
314 2 vFreq*=2;
315 2 }
316 1 //====================================
317 1
318 1 printf("\r\nHFreq = %d", hFreq);
319 1 printf("\r\nVFreq = %d", vFreq);
320 1 // check if input timing is out of range
321 1 if (hFreq>MaxInputHFreq || hFreq<MinInputHFreq || vFreq>MaxInputVFreq || vFreq<MinInputVFreq)
322 1 {
323 2 SrcFlags|=bUnsupportMode;
324 2 return TRUE;
325 2 }
326 1
327 1 // search input mode index
328 1 {
329 2 BYTE modeIndex=0;
330 2 InputModeType *modePtr=tStandardMode;
331 2 BOOL found=FALSE;
332 2
333 2
334 2 while (modePtr->HFreq)
335 2 {
336 3 { if (abs(hFreq-modePtr->HFreq)<modePtr->HSyncTolerence && abs(vFreq-modePtr->VFreq)<modePtr->VS
-yncTolerence &&
337 4 GetSyncPolarity(SrcFlags)&modePtr->Flags)
338 4 { found=TRUE;
339 5 g_ucSrcModeIndex=modeIndex;
340 5 break;
341 5 }
342 4 }
343 3 modePtr++;
344 3 modeIndex++;
345 3 }
346 2
347 2 if (!found) // out of standard input range
348 2 {
349 3 printMsg("cannot find mode in standard mode");
350 3 #define delta hFreq
351 3 #define minDelta vFreq
352 3
353 3 modeIndex=0;
354 3 modePtr=tStandardMode;
355 3 minDelta=VTotal_Delta;
356 3 while (modePtr->HFreq)
357 3 {
358 4 if (SrcVTotal>tStandardModeResolution[modePtr->ResIndex].DispHeight)
359 4 {
360 5 delta=abs(SrcVTotal-(modePtr->VTotal));
361 5 if (delta<VTotal_Delta && (SrcFlags&bInterlaceMode)==(modePtr->Flags&bInterlaceMode))
362 5 {
C51 COMPILER V8.18 DETECT 09/29/2009 23:58:04 PAGE 7
363 6 if (delta<minDelta)
364 6 {
365 7 minDelta=delta;
366 7 g_ucSrcModeIndex=modeIndex;
367 7 }
368 6 found=TRUE;
369 6 }
370 5 }
371 4 modePtr++;
372 4 modeIndex++;
373 4 }
374 3 #undef delta
375 3 #undef minDelta
376 3 } // out of standard input range
377 2
378 2 if (!found)
379 2 SrcFlags|=bUnsupportMode;
380 2 } // search mode index
381 1 return TRUE;
382 1 }
383
384 BYTE msGetInputStatus(void)
385 {
386 1 BYTE fStatus=0;
387 1 WORD inputValue,StatusTemp;
388 1 BYTE status;
389 1
390 1 inputValue=msReadWord(BK0_EB_HSPRD_H)&0x1FFF;
391 1 if (inputValue==0x1FFF || inputValue<10)
392 1 fStatus|=bHSyncLoss;
393 1
394 1 inputValue=msReadWord(BK0_ED_VTOTAL_H)&0x7FF;
395 1 if (inputValue==0x7FF || inputValue<10)
396 1 fStatus|=bVSyncLoss;
397 1
398 1 status=msReadByte(BK0_EF_STATUS2);
399 1
400 1 #if 1//Use_CF_MODE0
401 1 msWriteByte(BK0_00_REGBK, REG_BANK3_COMB); //Switch bank3 VCF
402 1 msWriteByte(BK3_70_COMB_STSA, 0xFF); // clear CF status
403 1 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER); //Switch bank0 Scaler
404 1 #endif //Use_CF_MODE0
405 1
406 1 StatusTemp=msReadByte(BK0_EF_STATUS2);
407 1 Delay1ms(30); //Delay 30ms
408 1 if((status&(bHSyncNegative|bVSyncNegative)) != (StatusTemp&(bHSyncNegative|bVSyncNegative)))
409 1 status |= SyncLoss;
410 1
411 1 fStatus|=(status&0x03); // Get input timing polarity
412 1
413 1 if (SyncLossState() && !(fStatus&SyncLoss)) // input timing is valid while current state is no sync
414 1 {
415 2 if (status&INTM_B)
416 2 {
417 3 msWriteByte(BK0_E2_SWRST0, OP2R_B);
418 3 Delay1ms(1);
419 3 msWriteByte(BK0_E2_SWRST0, 0);
420 3 }
421 2 Delay1ms(20);
422 2 if (g_bInputTimingChangeFlag)
423 2 return fStatus;
424 2
C51 COMPILER V8.18 DETECT 09/29/2009 23:58:04 PAGE 8
425 2 status=status&msReadByte(BK0_EF_STATUS2);
426 2 if ((status&3)!=(fStatus&3)) // polarity is stable
427 2 fStatus|=SyncLoss;
428 2 else if (status&0x30) // SOG or CSync input
429 2 {
430 3 Delay1ms(20);
431 3 if (g_bInputTimingChangeFlag)
432 3 return fStatus;
433 3
434 3 status=msReadByte(BK0_EF_STATUS2);
435 3 // Check if SOG/CSYNC is valid
436 3 if (abs(msReadWord(BK0_ED_VTOTAL_H)-inputValue)>2)
437 3 fStatus|=SyncLoss;
438 3
439 3 if ((status&0x50)==0x50 || (status&0xA0)==0xA0)
440 3 fStatus|=SyncLoss;
441 3 else if ((status&0x18)==0x18)
442 3 fStatus|=SyncLoss; // Check if SOG/CSYNC is valid
443 3 }
444 2 }
445 1 return fStatus;
446 1 }
447
448 void msProgAnalogWin()
449 {
450 1 _WindowType* pAnalogWindow = &g_WindowInfo;
451 1
452 1 {
453 2 pAnalogWindow->H_CapSize = GetStdModeResH(g_ucSrcModeIndex); // standard display width
454 2 pAnalogWindow->V_CapSize = GetStdModeResV(g_ucSrcModeIndex); // standard display height
455 2 if (pAnalogWindow->V_CapSize == 350) // if IBM VGA 640x350 then use 640x400 resolution and move to
- middle of screen
456 2 {
457 3 pAnalogWindow->V_CapSize = 400;
458 3 g_ModeSetting.VStart-= ((400-350)/2);
459 3 }
460 2 //pAnalogWindow->H_CapStart = g_ModeSetting.DefaultHStart*2 - g_ModeSetting.HStart;
461 2 pAnalogWindow->V_CapStart = g_ModeSetting.VStart;
462 2 }
463 1
464 1 SetDisplayWindow();
465 1
466 1 SetCaptureWindow();
467 1 SetScalingRatio( g_InOutCtl.bInterlace );
468 1 //msSetScaler();
469 1 }
470
471 //*******************************************************************
472 // Function Name: msSetupMode
473 //
474 // Decscription: setup registers for input timing,
475 // return : TRUE,
476 // caller:
477 // callee: msModeHandler() in detect.c
478 //*******************************************************************
479 BOOL msSetupMode(void)
480 {
481 1 if(SrcFlags&bInterlaceMode)
482 1 g_InOutCtl.bInterlace = 1;
483 1 else
484 1 g_InOutCtl.bInterlace = 0;
485 1
C51 COMPILER V8.18 DETECT 09/29/2009 23:58:04 PAGE 9
486 1 Clr_FreeRunModeFlag();
487 1 msSetupADC(); // setup ADC block, including polarity & htotal, phase, vco
488 1 msCommSetupMode();
489 1 SetOutputTimingAndWindow( OUTPUT_SIG);
490 1
491 1
492 1 /*
493 1 if (msSetCaptureWindow()==FALSE) // setup capture window
494 1 return FALSE;
495 1 msSetScalingFactor(); // setup scaling factor
496 1 if (msSetOutputDclk()==FALSE) // set output dclk
497 1 return TRUE;
498 1 */
499 1 msWriteByte(BK0_02_ISELECT, msReadByte(BK0_02_ISELECT)&(~NIS_B));// enable lock input mode
500 1 if (g_bInputTimingChangeFlag || msValidTimingDetect()) // check if input timing has changed
501 1 return FALSE;
502 1
503 1 // enable double buffer
504 1 msWriteByte(BK0_01_DBFC, 0x04); // enable double bufer.
505 1 msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU);
506 1 //msWriteByte(BK1_01_DBFC, 0x01); // enable ADC's double bufer.
507 1 msWriteByte(BK0_00_REGBK, REG_BANK_SCALER);
508 1
509 1 msSetInterrupt(INTERRUPT_PC);
510 1
511 1 return TRUE;
512 1 }
513
514 //*******************************************************************
515 // Function Name: msSetupADC
516 //
517 // Decscription: setup ADC bandwidth/filter, clock, phase for sampling input data
518 // and R/G/B gains, offsets
519 // caller: mSar_WriteByte(), msReadByte() in ms_rwreg.c
520 ///
521 // callee: msSetupMode() in mstar.c
522 //*******************************************************************
523 BYTE code ADCWB[5][3]= // ADC parameter table for setup ADC
524 { //ADC BandWidth 0D 0F
525 {0x55, 0x86, 0x05}, // < 15 (MHz)
526 {0x44, 0x86, 0x02}, // 15 < < 38 (MHz)
527 {0x33, 0x85, 0x03}, // 38 < < 70 (MHz)
528 {0x11, 0x83, 0x03}, // 70 < < 155 (MHz)
529 {0x00, 0x81, 0x03}, // 155 < (MHz)
530 };
531 void msSetupADC(void)
532 {
533 1 BYTE ucBank;
534 1 WORD tempValue;
535 1
536 1 ucBank = msReadByte( BK0_00_REGBK);
537 1
538 1 msWriteByte( BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU );
539 1
540 1 {// HSync Polarity:
541 2 // Leading Edge: Hstart=Hwidth+Hbp, BK1_0C[5]=0, BK0_04[4]=0
542 2 // Trailing Edge: Hstart=Hbp, BK1_0C[5]=1, BK0_04[4]=1
543 2 if (SrcFlags&bHSyncNegative)
544 2 msWriteByte(BK1_0C_GCTRL, msReadByte(BK1_0C_GCTRL)|_BIT7);
545 2 else
546 2 msWriteByte(BK1_0C_GCTRL, msReadByte(BK1_0C_GCTRL)&(~_BIT7));
547 2 }
C51 COMPILER V8.18 DETECT 09/29/2009 23:58:04 PAGE 10
548 1
549 1 tempValue=((DWORD)MST_CLOCK_KHZ*10+SrcHPeriod/2)/SrcHPeriod; //calculate hfreq: round 5
550 1 tempValue=((DWORD)tempValue*g_ModeSetting.HTotal+5000)/10000; //dclk= hfreq * htotal
551 1 // printData("input dclk %d", tempValue);
552 1 if (tempValue<15)
553 1 tempValue=0;
554 1 else if (tempValue<38)//82)
555 1 tempValue=1;
556 1 else if (tempValue<70)
557 1 tempValue=2;
558 1 else if (tempValue<155)
559 1 tempValue=3;
560 1 else
561 1 tempValue=4;
562 1 msWriteByteMask(BK1_2C, ADCWB[tempValue][0], 0x0F);// R bandwidth
563 1 msWriteByte(BK1_2D, ADCWB[tempValue][0]); // setup ADC bandwidth
564 1 msWriteByte(BK1_0D_BWCOEF, ADCWB[tempValue][1]); // setup ADC
565 1 msWriteByte(BK1_0F_DCOEF, ADCWB[tempValue][2]);
566 1
567 1 // setup clock
568 1 tempValue=g_ModeSetting.HTotal-3;
569 1 msWriteByte(BK1_02_PLLDIVM, tempValue>>4);
570 1 msWriteByte(BK1_03_PLLDIVL, (tempValue&0xF)<<4);
571 1 // setup phase
572 1 msWriteByte(BK1_10_CLKCTRL1, (g_ModeSetting.Phase+8)%0x40); // b5-0: clock phase adjust(PHASECC + 8)
573 1 msWriteByte(BK1_11_CLKCTRL2, g_ModeSetting.Phase); // b5-0: PHASECC(clock phase adjust)
574 1
575 1 //printf("\r\ng_ModeSetting.HorizontalTotal=%d", g_ModeSetting.HorizontalTotal);
576 1 // setup ADC gain
577 1 msWriteByte(BK0_00_REGBK, REG_BANK1_ADC_ACE_MCU); // switch to ADC bank
578 1 msWriteByte(BK1_04_RGAIN_ADC, 0xFF-g_PcSetting.AdcRedGain);
579 1 msWriteByte(BK1_05_GGAIN_ADC, 0xFF-g_PcSetting.AdcGreenGain);
580 1 msWriteByte(BK1_06_BGAIN_ADC, 0xFF-g_PcSetting.AdcBlueGain);
581 1 // setup ADC offset
582 1 msWriteByte(BK1_07_ROFFS_ADC, 0xFF-g_PcSetting.AdcRedOffset);
583 1 msWriteByte(BK1_08_GOFFS_ADC, 0xFF-g_PcSetting.AdcGreenOffset);
584 1 msWriteByte(BK1_09_BOFFS_ADC, 0xFF-g_PcSetting.AdcBlueOffset);
585 1 msWriteByte( BK0_00_REGBK, ucBank );
586 1 }
587
588
589 WORD GetStdModeResH( BYTE ucModeIdx )
590 {
591 1 if (tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispWidth < PanelWidth)
592 1 return tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispWidth * 2;
593 1 else
594 1 return tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispWidth;
595 1
596 1 return 1;
597 1 }
598 WORD GetStdModeResV( BYTE ucModeIdx )
599 {
600 1 return tStandardModeResolution[tStandardMode[ucModeIdx].ResIndex].DispHeight;
601 1
602 1 }
603
604 #endif
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 2602 ----
CONSTANT SIZE = 196 ----
C51 COMPILER V8.18 DETECT 09/29/2009 23:58:04 PAGE 11
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- 24
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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