📄 main_ezlink.c
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/*
** ============================================================================
**
** FILE
** main.c
**
** DESCRIPTION
** This is the main file of the project.
** HW platform EZLink module with C8051F93x Silabs MCU
**
** CREATED
** Silicon Laboratories Hungary Ltd
**
** COPYRIGHT
** Copyright 2009 Silicon Laboratories, Inc.
** http://www.silabs.com
**
** ============================================================================
*/
/* ======================================================== *
* INCLUDE *
* ======================================================== */
#include "C8051F930_defs.h"
#include "compiler_defs.h"
#include <string.h>
/* ================================================================ *
* C8051F930 Pin definitions for EZLink platform *
* (using compiler_def.h macros) *
* ================================================================ */
SBIT (NSS, SFR_P1, 3);
SBIT (NIRQ, SFR_P0, 6);
SBIT (SDN, SFR_P0, 1);
SBIT (RX_LED, SFR_P2, 0);
SBIT (TX_LED, SFR_P1, 6);
SBIT (PB, SFR_P0, 7);
/* ======================================================== *
* Function PROTOTYPES *
* ======================================================== */
//MCU initialization
void MCU_Init(void);
//SPI functions
void SpiWriteRegister (U8, U8);
U8 SpiReadRegister (U8);
/* ======================================================= *
* GLOBAL VARIABLE *
* ======================================================= */
code U8 tx_packet[128] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
96, 97, 98, 99, 100,101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127};
xdata U8 rx_packet[128];
void main(void)
{
U8 ItStatus1,ItStatus2;
U16 delay;
U8 length,temp8,pointer;
//Initialize the MCU:
// - set IO ports for the Software Development board
// - set MCU clock source
// - initialize the SPI port
// - turn off LEDs
MCU_Init();
/* ======================================================== *
* Initialize the Si443x ISM chip *
* ======================================================== */
//Turn on the radio by pulling down the PWRDN pin
SDN = 0;
//Wait at least 15ms befory any initialization SPI commands are sent to the radio
// (wait for the power on reset sequence)
for (temp8=0;temp8<15;temp8++)
{
for(delay=0;delay<10000;delay++);
}
//read interrupt status registers to clear the interrupt flags and release NIRQ pin
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
//SW reset
SpiWriteRegister(0x07, 0x80); //write 0x80 to the Operating & Function Control1 register
//wait for POR interrupt from the radio (while the nIRQ pin is high)
while ( NIRQ == 1);
//read interrupt status registers to clear the interrupt flags and release NIRQ pin
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
//wait for chip ready interrupt from the radio (while the nIRQ pin is high)
while ( NIRQ == 1);
//read interrupt status registers to clear the interrupt flags and release NIRQ pin
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
/*set the physical parameters*/
//set the center frequency to 915 MHz
SpiWriteRegister(0x75, 0x75); //write 0x75 to the Frequency Band Select register
SpiWriteRegister(0x76, 0xBB); //write 0xBB to the Nominal Carrier Frequency1 register
SpiWriteRegister(0x77, 0x80); //write 0x80 to the Nominal Carrier Frequency0 register
//set the desired TX data rate (9.6kbps)
SpiWriteRegister(0x6E, 0x4E); //write 0x4E to the TXDataRate 1 register
SpiWriteRegister(0x6F, 0xA5); //write 0xA5 to the TXDataRate 0 register
SpiWriteRegister(0x70, 0x2C); //write 0x2C to the Modulation Mode Control 1 register
//set the TX power to MAX
SpiWriteRegister(0x6D, 0x1F); //write 0x1F to the TX Power register
//set the Tx deviation register (+-45kHz)
SpiWriteRegister(0x72, 0x48); //write 0x48 to the Frequency Deviation register
/*set the modem parameters according to the exel calculator(parameters: 9.6 kbps, deviation: 45 kHz, channel filter BW: 102.1 kHz*/
SpiWriteRegister(0x1C, 0x1E); //write 0x1E to the IF Filter Bandwidth register
SpiWriteRegister(0x20, 0xD0); //write 0xD0 to the Clock Recovery Oversampling Ratio register
SpiWriteRegister(0x21, 0x00); //write 0x00 to the Clock Recovery Offset 2 register
SpiWriteRegister(0x22, 0x9D); //write 0x9D to the Clock Recovery Offset 1 register
SpiWriteRegister(0x23, 0x49); //write 0x49 to the Clock Recovery Offset 0 register
SpiWriteRegister(0x24, 0x00); //write 0x00 to the Clock Recovery Timing Loop Gain 1 register
SpiWriteRegister(0x25, 0x24); //write 0x24 to the Clock Recovery Timing Loop Gain 0 register
SpiWriteRegister(0x1D, 0x40); //write 0x40 to the AFC Loop Gearshift Override register
SpiWriteRegister(0x1E, 0x0A); //write 0x0A to the AFC Timing Control register
SpiWriteRegister(0x2A, 0x20); //write 0x20 to the AFC Limiter register
/*set the packet structure and the modulation type*/
//set the preamble length to 5bytes
SpiWriteRegister(0x34, 0x0A); //write 0x0A to the Preamble Length register
//set preamble detection threshold to 20bits
SpiWriteRegister(0x35, 0x2A); //write 0x2A to the Preamble Detection Control register
//Disable header bytes; set variable packet length (the length of the payload is defined by the
//received packet length field of the packet); set the synch word to two bytes long
SpiWriteRegister(0x33, 0x02); //write 0x02 to the Header Control2 register
//Set the sync word pattern to 0x2DD4
SpiWriteRegister(0x36, 0x2D); //write 0x2D to the Sync Word 3 register
SpiWriteRegister(0x37, 0xD4); //write 0xD4 to the Sync Word 2 register
//enable the TX & RX packet handler and CRC-16 (IBM) check
SpiWriteRegister(0x30, 0x8D); //write 0x8D to the Data Access Control register
//Disable the receive header filters
SpiWriteRegister(0x32, 0x00 ); //write 0x00 to the Header Control1 register
//enable FIFO mode and GFSK modulation
SpiWriteRegister(0x71, 0x63); //write 0x63 to the Modulation Mode Control 2 register
//set the TX FIFO almost empty threshold to 10 bytes
SpiWriteRegister(0x7D, 0x0B); //write 0x0B to the TX FIFO Control 2 register
//set the RX FIFO almost full threshold to 54 bytes
SpiWriteRegister(0x7E,0x36);
/*set the GPIO's according to the RF switch */
SpiWriteRegister(0x0C, 0x12); //write 0x12 to the GPIO1 Configuration(set the TX state)
SpiWriteRegister(0x0D, 0x15); //write 0x15 to the GPIO2 Configuration(set the RX state)
/*set the non-default Si443x registers*/
//set cap. bank
SpiWriteRegister(0x09, 0xD7); //write 0xD7 to the Crystal Oscillator Load Capacitance register
/*enable receiver chain*/
SpiWriteRegister(0x07, 0x05); //write 0x05 to the Operating Function Control 1 register
//Enable three interrupts:
// a) one which shows that a valid packet received: 'ipkval'
// b) second shows if the packet received with incorrect CRC: 'icrcerror'
// c) third shows if the RX fifo almost full: 'irxffafull'
SpiWriteRegister(0x05, 0x13); //write 0x13 to the Interrupt Enable 1 register
SpiWriteRegister(0x06, 0x00); //write 0x00 to the Interrupt Enable 2 register
//read interrupt status registers to release all pending interrupts
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
/*MAIN Loop*/
while(1)
{
//Poll the port pins of the MCU to figure out whether the push button is pressed or not
if(PB == 0)
{
//Wait for releasing the push button
while( PB == 0 );
//disable the receiver chain (but keep the XTAL running to have shorter TX on time!)
SpiWriteRegister(0x07, 0x01); //write 0x01 to the Operating Function Control 1 register
//turn on the LED to show the packet transmission
TX_LED = 1;
/*SET THE CONTENT OF THE PACKET*/
//set the length of the payload to 8bytes
SpiWriteRegister(0x3E, 128); //write 128 to the Transmit Packet Length register
//fill the payload into the transmit FIFO
//write 64bytes into the FIFO
for(temp8=0;temp8<64;temp8++)
{
SpiWriteRegister(0x7F,tx_packet[temp8]);
}
//Disable all other interrupts and enable the FIFO almost empty interrupt only.
SpiWriteRegister(0x05, 0x20); //write 0x20 to the Interrupt Enable 1 register
SpiWriteRegister(0x06, 0x00); //write 0x00 to the Interrupt Enable 2 register
//Read interrupt status regsiters. It clear all pending interrupts and the nIRQ pin goes back to high.
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
/*enable transmitter*/
//The radio forms the packet and send it automatically.
SpiWriteRegister(0x07, 0x09); //write 0x09 to the Operating Function Control 1 register
/*wait for TX FIFO almost empty interrupt*/
while(NIRQ == 1);
//TX FIFO almost empty interrupt occured -->
//write the next 32bytes into the FIFO
for(temp8=0;temp8<32;temp8++)
{
SpiWriteRegister(0x7F,tx_packet[64+temp8]);
}
//Read interrupt status regsiters. It clear all pending interrupts and the nIRQ pin goes back to high.
ItStatus1 = SpiReadRegister(0x03); //read the Interrupt Status1 register
ItStatus2 = SpiReadRegister(0x04); //read the Interrupt Status2 register
/*Wait for TX FIFO almost empty interrupt*/
while(NIRQ == 1);
//TX FIFO almost empty interrupt occured -->
//write the last 32bytes into the FIFO
for(temp8=0;temp8<32;temp8++) //copy the remain 32 byte to the FIFO
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