test.c

ICETEK-DM642-EDUlabv1.3.rar

/*
 *  Copyright 2003 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 */

/*
 *  ======== test.c ========
 *
 *  This test program performs a confidence test on severl of the DM642 EVM
 *  board components.  The following tests are performed:
 *
 *  Index   Description
 *    1     LEDs
 *    2     SPDIF/APLL/VCXO
 *    3     Synchronous Bus
 *    4     SDRAM
 *    5     Flash ID
 *    6     Flash (entire contents)
 *    7     I2C EEPROM
 *    8     UARTA Loopback
 *    9     UARTB Loopback
 *    10    PCI EEPROM
 */

/*
 *  DSP/BIOS is configured using the DSP/BIOS configuration tool.  Settings
 *  for this example are stored in a configuration file called test.cdb.  At
 *  compile time, Code Composer will auto-generate DSP/BIOS related files
 *  based on these settings.  A header file called testcfg.h contains the
 *  results of the autogeneration and must be included for proper operation.
 *  The name of the file is taken from test.cdb and adding cfg.h.
 */
#include "testcfg.h"

/*
 *  The POST uses the Chip Support Library for basic definitions as well as
 *  McBSP manipulation.  Programs that use the CSL must include the
 *  appropriate header files.
 */
#include <stdio.h>
#include <std.h>
#include <sys.h>
#include <csl.h>
#include <csl_mcbsp.h>
#include <csl_timer.h>
#include <csl_edma.h>
#include <csl_vic.h>
#include <csl_mcasp.h>
#include <csl_gpio.h>
#include <csl_pci.h>

/*
 *  The DM642 EVM Board Support Library is divided into several modules, each
 *  of which has its own include file.  The file evmdm642.h must be included
 *  in every program that uses the BSL.  This example also includes
 *  evmdm642_aic23.h, evmdm642_led.h and evmdm642_flash.h because it uses
 *  their respective BSL modules.
 */
#include "evmdm642.h"
#include "evmdm642_led.h"
#include "evmdm642_aic23.h"
#include "evmdm642_flash.h"
#include "evmdm642_eeprom.h"
#include "evmdm642_uart.h"
#include "evmdm642_apll.h"
#include "evmdm642_pci.h"

/* Length of sine wave table */
#define SINE_TABLE_SIZE  48

/* Number of elements for DMA and McBSP loopback tests */
#define N                16

/* Pre-generated sine wave data, 16-bit signed samples */
int sinetable[SINE_TABLE_SIZE] = {
    0x0000, 0x10b4, 0x2120, 0x30fb, 0x3fff, 0x4dea, 0x5a81, 0x658b,
    0x6ed8, 0x763f, 0x7ba1, 0x7ee5, 0x7ffd, 0x7ee5, 0x7ba1, 0x76ef,
    0x6ed8, 0x658b, 0x5a81, 0x4dea, 0x3fff, 0x30fb, 0x2120, 0x10b4,
    0x0000, 0xef4c, 0xdee0, 0xcf06, 0xc002, 0xb216, 0xa57f, 0x9a75,
    0x9128, 0x89c1, 0x845f, 0x811b, 0x8002, 0x811b, 0x845f, 0x89c1,
    0x9128, 0x9a76, 0xa57f, 0xb216, 0xc002, 0xcf06, 0xdee0, 0xef4c
};

/* Codec configuration settings */
EVMDM642_AIC23_Config config = { \
    0x0017,  /* 0 EVMDM642_AIC23_LEFTINVOL  Left line input channel volume */ \
    0x0017,  /* 1 EVMDM642_AIC23_RIGHTINVOL Right line input channel volume */\
    0x01f9,  /* 2 EVMDM642_AIC23_LEFTHPVOL  Left channel headphone volume */  \
    0x01f9,  /* 3 EVMDM642_AIC23_RIGHTHPVOL Right channel headphone volume */ \
    0x0011,  /* 4 EVMDM642_AIC23_ANAPATH    Analog audio path control */      \
    0x0000,  /* 5 EVMDM642_AIC23_DIGPATH    Digital audio path control */     \
    0x0000,  /* 6 EVMDM642_AIC23_POWERDOWN  Power down control */             \
    0x0043,  /* 7 EVMDM642_AIC23_DIGIF      Digital audio interface format */ \
    0x0081,  /* 8 EVMDM642_AIC23_SAMPLERATE Sample rate control */            \
    0x0001   /* 9 EVMDM642_AIC23_DIGACT     Digital interface activation */   \
};

/* Define source and destination arrays for DMA and loopback tests */
Uint16 src[N], dst[N], buffer[256];

/* Variables used by the TEST_sleep() funciton */
Uint16 eventId1;
volatile Uint32 sleepCount = 0;

/* Flag to make sure POST only runs once after power cycle */
Uint32 testflag;

/* McASP definitions for SPDIF mode */
MCASP_ConfigGbl mcaspCfgDataGblSpdif = {
    0x00000000, /* PFUNC -     All pins as McASP */
    0x00000005, /* PDIR  -     XMT DATA output, rest are inputs */
    0x00000001, /* DITCTL -    DIT mode enable */
    0x00000000, /* DLBCTL -    Loopback disabled */
    0x00000000  /* AMUTE  -    Never drive AMUTE */
};

MCASP_ConfigRcv mcaspCfgDataRcvSpdif = {
    0x00000000, /* RMASK -     Inactive */
    0x00000000, /* RFMT -      Inactive */
    0x00000000, /* AFSRCTL -   Inactive */
    0x00000000, /* ACLKRCTL -  Inactive */
    0x00000000, /* AHCLKRCTL - Inactive */
    0x00000000, /* RTDM -      Inactive */
    0x00000000, /* RINTCTL -   Inactive */
    0x00000000  /* RCLKCHK -   Inactive */ 
};

MCASP_ConfigXmt mcaspCfgDataXmtSpdif = {
    0x00ffffff, /* XMASK -     Use 16 bits */
    0x000000f8, /* XFMT -      LSB first, 32-bit slots, CPU bus, 0 bit delay */
    0x0000c002, /* AFSXCTL -   384 slot DIT, int FS */
    0x00000061, /* ACLKXCTL -  Internal CLK, ASYNC, div by 2 */
    0x00000000, /* AHCLKXCTL - External HCLK, rising edge, div by 1 */
    0xffffffff, /* XTDM -      Enable all for DIT mode */
    0x00000000, /* XINTCTL -   No interrupts */
    0x00000000  /* XCLKCHK -   Not used */
};

MCASP_ConfigSrctl mcaspCfgDataSrctlSpdif = {
    0x00000000, /* SRCTL0 -    Inactive */
    0x00000000, /* SRCTL1 -    Inactive */
    0x0000000d, /* SRCTL2 -    Active */
    0x00000000, /* SRCTL3 -    Inactive */
    0x00000000, /* SRCTL4 -    Inactive */
    0x00000000, /* SRCTL5 -    Inactive */
    0x00000000, /* SRCTL6 -    Inactive */
    0x00000000  /* SRCTL7 -    Inactive */
};

MCASP_Config mcaspCfgDataSpdif = {
    &mcaspCfgDataGblSpdif,
    &mcaspCfgDataRcvSpdif,
    &mcaspCfgDataXmtSpdif,
    &mcaspCfgDataSrctlSpdif
};


/*
 *  Interrupt Service Routines
 */

void sleepIsr()
{
    sleepCount++;
}

/*
 *  Accessory functions
 */

void TEST_sleep(Int16 sleeptime)
{
    TIMER_Handle hTimer1;
    TIMER_Config timerCfg1 = {
        TIMER_FMKS(CTL, INVINP, NO)             |
        TIMER_FMKS(CTL, CLKSRC, CPUOVR8)        |
        TIMER_FMKS(CTL, CP, PULSE)              |
        TIMER_FMKS(CTL, HLD, YES)               |
        TIMER_FMKS(CTL, GO, NO)                 |
        TIMER_FMKS(CTL, PWID, ONE)              |
        TIMER_FMKS(CTL, DATOUT, 0)              |
        TIMER_FMKS(CTL, INVOUT, NO)             |
        TIMER_FMKS(CTL, FUNC, TOUT),
        
        TIMER_FMKS(PRD, PRD, OF(75000)),
        TIMER_FMKS(CNT, CNT, OF(0))
    };
    
    /* Open the timer */
    hTimer1 = TIMER_open(TIMER_DEV1, TIMER_OPEN_RESET);
    
    /* Configure the timer in one-shot mode */
    TIMER_config(hTimer1, &timerCfg1);

    /* Get Event Id associated with Timer 1, for use with */
    /* CSL interrupt enable functions.                    */         
    eventId1 = TIMER_getEventId(hTimer1);

    /* Map the logical event to a physical interrupt */
    IRQ_map(eventId1, 15);

    /* Clear any pending Timer interrupts */
    IRQ_clear(eventId1);
 
    /* Enable timer interrupt */
    IRQ_enable(eventId1);
    
  	/* Make sure global interrupts are enabled */
  	IRQ_globalEnable();   

    /* Clear sleep count */
    sleepCount = 0;
    
    /* Start timer 1 */
    TIMER_start(hTimer1);
    
    while(sleepCount < sleeptime);
    
    /* Disable timer interrupt */
    IRQ_disable(eventId1);
    
    TIMER_close(hTimer1);
}

void LED_binary(Int16 ledmask)
{
    Int16 i, bit;
    
    /* Walk through the bits in num setting corresponding LEDs */
    bit = 1;
    for (i = 0; i < 8; i++)
    {
        if (ledmask & bit)
            EVMDM642_LED_on(i);
        else
            EVMDM642_LED_off(i);
        bit = bit << 1;
    }
}

void LED_blink(Int16 ledmask, Int16 count)
{
    while (count > 0)
    {
        LED_binary(ledmask);
        TEST_sleep(100);
        LED_binary(0);
        TEST_sleep(150);
        count--;
    }
}

void LED_error(Int16 ledmask)
{
    while(1)
        LED_blink(ledmask, 1);
}

/*
 *  Memory functions
 */
 
Int16 MEM_fill(Uint32 start, Uint32 len, Uint32 val)
{
    Uint32 i, end;
    
    /* Calculate end of range */
    end = start + len;
    
    /* Fill a range with a value */
    for (i = start; i < end; i+=4)
    {
        *((Uint32 *)i) = val;
    }
        
    /* Verify the data */
    for (i = start; i < end; i+=4)
    {
        if (*((Uint32 *)i) != val)
            return 1;
    }
    
    return 0;
}

Int16 MEM_addr(Uint32 start, Uint32 len)
{
    Uint32 i, end;
    
    /* Calculate end of range */
    end = start + len;
    
    /* Fill the range with its address */
    for (i = start; i < end; i+=4)
    {
        *((Uint32 *)i) = i;
    }

    /* Verify the data */
    for (i = start; i < end; i+=4)
        if (*((Uint32 *)i) != i)
            return 2;
    
    return 0;
}

Int16 MEM_addrInv(Uint32 start, Uint32 len)
{
    Uint32 i, end;
    
    /* Calculate end of range */
    end = start + len;
    
    /* Fill the range with its address */
    for (i = start; i < end; i+=4)
    {
        *((Uint32 *)i) = ~i;
    }

    /* Verify the data */
    for (i = start; i < end; i+=4)
        if (*((Uint32 *)i) != (~i))
            return 4;
    
    return 0;
}

Int16 MEM_walking(Uint32 add)
{
    Int16 i;
    Uint32 mask, *pdata;
    
    pdata = (Uint32 *)add;

    /* Walking ones and zeros */
    mask = 1;
    for (i = 0; i < 32; i++)
    {
        /* Test one in bit position i */
        *pdata = mask;
        
        /* Do a dummy write to Flash to clear bus */
        *((Uint8 *)EVMDM642_FLASH_BASE) = 0xf0;
        
        /* Check data */
        if (*pdata != mask)
            return 1;
            
        /* Test zero in bit position i */
        *pdata = ~mask;
        
        /* Do a dummy write to Flash to clear bus */
        *((Uint8 *)EVMDM642_FLASH_BASE) = 0xf0;

        /* Check data */
        if (*pdata != (~mask))
            return 8;
            
        mask = mask << 1;
    }
    
    return 0;
}

Int16 MEM_bytestrobe(Uint32 add)
{
    Uint32 *pdata;
    Uint8 *pcheck;
    
    /* Write pattern */
    pdata = (Uint32 *)add;
    *pdata = 0x12345678;
    
    /* Do dummy write */
    pdata = (Uint32 *)EVMDM642_FLASH_BASE;
    *pdata = 0x80808080;
    
    /* Check pattern */
    pcheck = (Uint8 *)add;
    if (*pcheck++ != 0x78)
        return 0x10;
    if (*pcheck++ != 0x56)
        return 0x20;
    if (*pcheck++ != 0x34)
        return 0x40;
    if (*pcheck++ != 0x12)
        return 0x80;
        
    return 0;
}

Int16 MEM_test(Uint32 start, Uint32 len, Int16 patterntype)
{
    Int16 status = 0;
    
    if (!patterntype)
    {
        /* Run the fill tests */
        status |= MEM_fill(start, len, 0x00000000);
        status |= MEM_fill(start, len, 0x55555555);
        status |= MEM_fill(start, len, 0xAAAAAAAA);
        status |= MEM_fill(start, len, 0xFFFFFFFF);
    } else
    {
        /* Run the address tests */
        status |= MEM_addr(start, len);
        status |= MEM_addrInv(start, len);
    }
        
    return status;
}


/*
 *  POST tests
 */

Int16 TEST_intMem()
{
    Int16 status = 0;
    
    /* Check internal memory (byte 0x20000 to byte 0x40000) */
    status |= MEM_test(0x20000, 0x20000, 0);
    status |= MEM_test(0x20000, 0x20000, 1);
    status |= MEM_walking(0x20000);
      
    return status;
}

Int16 TEST_extMem()
{
    Int16 status = 0;
    
    /* Check external memory (byte 0x80000000 to byte 0x82000000) */
    status |= MEM_test(0x80000000, 0x02000000, 0);
    status |= MEM_test(0x80000000, 0x02000000, 1);
    status |= MEM_walking(0x80000000);
    status |= MEM_bytestrobe(0x80000000);
         
    return status;
}

Int16 TEST_flashID()
{
    Uint8 MfgId,DevId;
    Int16 i;
    
    /* Reset flash */
    *((Uint8 *)EVMDM642_FLASH_BASE) = 0xf0;
 
    /* Configure to read manufacturer ID */
    *((Uint8 *)EVMDM642_FLASH_BASE+0x555) = 0xaa;
    *((Uint8 *)EVMDM642_FLASH_BASE+0x2aa) = 0x55;
    *((Uint8 *)EVMDM642_FLASH_BASE+0x555) = 0x90; 
    
    /* Insert small delay for device to respond */
    for (i = 0; i < 10; i++);

    /* Read IDs */
    MfgId = *((Uint8 *)EVMDM642_FLASH_BASE);
    DevId = *((Uint8 *)EVMDM642_FLASH_BASE + 1);

    /* Reset flash */
    *((Uint8 *)EVMDM642_FLASH_BASE) = 0xf0;

    /* Check IDs */
    if ((MfgId != 0x0004) || (DevId != 0x37))
        return 1;

    /* Test passed */
    return 0;
}

Int16 TEST_mcbsp(int devid, Int16 delayed)
{
    Int16 i;
    Uint16 receivedata;
    MCBSP_Handle hMcbsp;
    MCBSP_Config mcbspCfg_loopback = {
        MCBSP_FMKS(SPCR, FREE, NO)              |
        MCBSP_FMKS(SPCR, SOFT, NO)              |
        MCBSP_FMKS(SPCR, FRST, YES)             |
        MCBSP_FMKS(SPCR, GRST, YES)             |
        MCBSP_FMKS(SPCR, XINTM, XRDY)           |
        MCBSP_FMKS(SPCR, XSYNCERR, NO)          |
        MCBSP_FMKS(SPCR, XRST, YES)             |
        MCBSP_FMKS(SPCR, DLB, ON)               |
        MCBSP_FMKS(SPCR, RJUST, RZF)            |
        MCBSP_FMKS(SPCR, CLKSTP, DISABLE)       |
        MCBSP_FMKS(SPCR, DXENA, OFF)            |
        MCBSP_FMKS(SPCR, RINTM, RRDY)           |
        MCBSP_FMKS(SPCR, RSYNCERR, NO)          |
        MCBSP_FMKS(SPCR, RRST, YES),
        
        MCBSP_FMKS(RCR, RPHASE, SINGLE)         |