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📄 sdcard.txt

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;;;2127       errorstatus = SD_CMD_CRC_FAIL;
00001e  2401              MOVS     r4,#1
;;;2128       SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL);
000020  4620              MOV      r0,r4
                  |L3.34|
000022  f7fffffe          BL       SDIO_ClearFlag
000026  e059              B        |L3.220|
                  |L3.40|
;;;2129       return(errorstatus);
;;;2130     }
;;;2131   
;;;2132     /* Check response received is of desired command */
;;;2133     if (SDIO_GetCommandResponse() != cmd)
000028  f7fffffe          BL       SDIO_GetCommandResponse
00002c  42a8              CMP      r0,r5
00002e  d12b              BNE      |L3.136|
;;;2134     {
;;;2135       errorstatus = SD_ILLEGAL_CMD;
;;;2136       return(errorstatus);
;;;2137     }
;;;2138   
;;;2139     /* Clear all the static flags */
;;;2140     SDIO_ClearFlag(SDIO_STATIC_FLAGS);
000030  f24050ff          MOV      r0,#0x5ff
000034  f7fffffe          BL       SDIO_ClearFlag
;;;2141   
;;;2142     /* We have received response, retrieve it for analysis  */
;;;2143     response_r1 = SDIO_GetResponse(SDIO_RESP1);
000038  2000              MOVS     r0,#0
00003a  f7fffffe          BL       SDIO_GetResponse
;;;2144   
;;;2145     if ((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO)
00003e  4929              LDR      r1,|L3.228|
000040  4208              TST      r0,r1
000042  d04b              BEQ      |L3.220|
;;;2146     {
;;;2147       return(errorstatus);
;;;2148     }
;;;2149   
;;;2150     if (response_r1 & SD_OCR_ADDR_OUT_OF_RANGE)
000044  2800              CMP      r0,#0
000046  da01              BGE      |L3.76|
;;;2151     {
;;;2152       return(SD_ADDR_OUT_OF_RANGE);
000048  201c              MOVS     r0,#0x1c
;;;2153     }
;;;2154   
;;;2155     if (response_r1 & SD_OCR_ADDR_MISALIGNED)
;;;2156     {
;;;2157       return(SD_ADDR_MISALIGNED);
;;;2158     }
;;;2159   
;;;2160     if (response_r1 & SD_OCR_BLOCK_LEN_ERR)
;;;2161     {
;;;2162       return(SD_BLOCK_LEN_ERR);
;;;2163     }
;;;2164   
;;;2165     if (response_r1 & SD_OCR_ERASE_SEQ_ERR)
;;;2166     {
;;;2167       return(SD_ERASE_SEQ_ERR);
;;;2168     }
;;;2169   
;;;2170     if (response_r1 & SD_OCR_BAD_ERASE_PARAM)
;;;2171     {
;;;2172       return(SD_BAD_ERASE_PARAM);
;;;2173     }
;;;2174   
;;;2175     if (response_r1 & SD_OCR_WRITE_PROT_VIOLATION)
;;;2176     {
;;;2177       return(SD_WRITE_PROT_VIOLATION);
;;;2178     }
;;;2179   
;;;2180     if (response_r1 & SD_OCR_LOCK_UNLOCK_FAILED)
;;;2181     {
;;;2182       return(SD_LOCK_UNLOCK_FAILED);
;;;2183     }
;;;2184   
;;;2185     if (response_r1 & SD_OCR_COM_CRC_FAILED)
;;;2186     {
;;;2187       return(SD_COM_CRC_FAILED);
;;;2188     }
;;;2189   
;;;2190     if (response_r1 & SD_OCR_ILLEGAL_CMD)
;;;2191     {
;;;2192       return(SD_ILLEGAL_CMD);
;;;2193     }
;;;2194   
;;;2195     if (response_r1 & SD_OCR_CARD_ECC_FAILED)
;;;2196     {
;;;2197       return(SD_CARD_ECC_FAILED);
;;;2198     }
;;;2199   
;;;2200     if (response_r1 & SD_OCR_CC_ERROR)
;;;2201     {
;;;2202       return(SD_CC_ERROR);
;;;2203     }
;;;2204   
;;;2205     if (response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR)
;;;2206     {
;;;2207       return(SD_GENERAL_UNKNOWN_ERROR);
;;;2208     }
;;;2209   
;;;2210     if (response_r1 & SD_OCR_STREAM_READ_UNDERRUN)
;;;2211     {
;;;2212       return(SD_STREAM_READ_UNDERRUN);
;;;2213     }
;;;2214   
;;;2215     if (response_r1 & SD_OCR_STREAM_WRITE_OVERRUN)
;;;2216     {
;;;2217       return(SD_STREAM_WRITE_OVERRUN);
;;;2218     }
;;;2219   
;;;2220     if (response_r1 & SD_OCR_CID_CSD_OVERWRIETE)
;;;2221     {
;;;2222       return(SD_CID_CSD_OVERWRITE);
;;;2223     }
;;;2224   
;;;2225     if (response_r1 & SD_OCR_WP_ERASE_SKIP)
;;;2226     {
;;;2227       return(SD_WP_ERASE_SKIP);
;;;2228     }
;;;2229   
;;;2230     if (response_r1 & SD_OCR_CARD_ECC_DISABLED)
;;;2231     {
;;;2232       return(SD_CARD_ECC_DISABLED);
;;;2233     }
;;;2234   
;;;2235     if (response_r1 & SD_OCR_ERASE_RESET)
;;;2236     {
;;;2237       return(SD_ERASE_RESET);
;;;2238     }
;;;2239   
;;;2240     if (response_r1 & SD_OCR_AKE_SEQ_ERROR)
;;;2241     {
;;;2242       return(SD_AKE_SEQ_ERROR);
;;;2243     }
;;;2244     return(errorstatus);
;;;2245   }
00004a  bd70              POP      {r4-r6,pc}
                  |L3.76|
00004c  0041              LSLS     r1,r0,#1              ;2155
00004e  d501              BPL      |L3.84|
000050  2009              MOVS     r0,#9                 ;2157
000052  bd70              POP      {r4-r6,pc}
                  |L3.84|
000054  0081              LSLS     r1,r0,#2
000056  d501              BPL      |L3.92|
000058  200a              MOVS     r0,#0xa               ;2162
00005a  bd70              POP      {r4-r6,pc}
                  |L3.92|
00005c  00c1              LSLS     r1,r0,#3
00005e  d501              BPL      |L3.100|
000060  200b              MOVS     r0,#0xb               ;2167
000062  bd70              POP      {r4-r6,pc}
                  |L3.100|
000064  0101              LSLS     r1,r0,#4
000066  d501              BPL      |L3.108|
000068  200c              MOVS     r0,#0xc               ;2172
00006a  bd70              POP      {r4-r6,pc}
                  |L3.108|
00006c  0141              LSLS     r1,r0,#5              ;2175
00006e  d501              BPL      |L3.116|
000070  200d              MOVS     r0,#0xd               ;2177
000072  bd70              POP      {r4-r6,pc}
                  |L3.116|
000074  01c1              LSLS     r1,r0,#7              ;2180
000076  d501              BPL      |L3.124|
000078  200e              MOVS     r0,#0xe               ;2182
00007a  bd70              POP      {r4-r6,pc}
                  |L3.124|
00007c  0201              LSLS     r1,r0,#8              ;2185
00007e  d501              BPL      |L3.132|
000080  200f              MOVS     r0,#0xf               ;2187
000082  bd70              POP      {r4-r6,pc}
                  |L3.132|
000084  0241              LSLS     r1,r0,#9              ;2190
000086  d501              BPL      |L3.140|
                  |L3.136|
000088  2010              MOVS     r0,#0x10              ;2192
00008a  bd70              POP      {r4-r6,pc}
                  |L3.140|
00008c  0281              LSLS     r1,r0,#10             ;2195
00008e  d501              BPL      |L3.148|
000090  2011              MOVS     r0,#0x11              ;2197
000092  bd70              POP      {r4-r6,pc}
                  |L3.148|
000094  02c1              LSLS     r1,r0,#11             ;2200
000096  d501              BPL      |L3.156|
000098  2012              MOVS     r0,#0x12              ;2202
00009a  bd70              POP      {r4-r6,pc}
                  |L3.156|
00009c  0301              LSLS     r1,r0,#12             ;2205
00009e  d501              BPL      |L3.164|
0000a0  2013              MOVS     r0,#0x13              ;2207
0000a2  bd70              POP      {r4-r6,pc}
                  |L3.164|
0000a4  0341              LSLS     r1,r0,#13             ;2210
0000a6  d501              BPL      |L3.172|
0000a8  2014              MOVS     r0,#0x14              ;2212
0000aa  bd70              POP      {r4-r6,pc}
                  |L3.172|
0000ac  0381              LSLS     r1,r0,#14             ;2215
0000ae  d501              BPL      |L3.180|
0000b0  2015              MOVS     r0,#0x15              ;2217
0000b2  bd70              POP      {r4-r6,pc}
                  |L3.180|
0000b4  03c1              LSLS     r1,r0,#15             ;2220
0000b6  d501              BPL      |L3.188|
0000b8  2016              MOVS     r0,#0x16              ;2222
0000ba  bd70              POP      {r4-r6,pc}
                  |L3.188|
0000bc  0401              LSLS     r1,r0,#16             ;2225
0000be  d501              BPL      |L3.196|
0000c0  2017              MOVS     r0,#0x17              ;2227
0000c2  bd70              POP      {r4-r6,pc}
                  |L3.196|
0000c4  0441              LSLS     r1,r0,#17             ;2230
0000c6  d501              BPL      |L3.204|
0000c8  2018              MOVS     r0,#0x18              ;2232
0000ca  bd70              POP      {r4-r6,pc}
                  |L3.204|
0000cc  0481              LSLS     r1,r0,#18             ;2235
0000ce  d501              BPL      |L3.212|
0000d0  2019              MOVS     r0,#0x19              ;2237
0000d2  bd70              POP      {r4-r6,pc}
                  |L3.212|
0000d4  0700              LSLS     r0,r0,#28             ;2240
0000d6  d501              BPL      |L3.220|
0000d8  201a              MOVS     r0,#0x1a              ;2242
0000da  bd70              POP      {r4-r6,pc}
                  |L3.220|
0000dc  4620              MOV      r0,r4                 ;2244
0000de  bd70              POP      {r4-r6,pc}
;;;2246   
                          ENDP

                  |L3.224|
0000e0  40018000          DCD      0x40018000
                  |L3.228|
0000e4  fdffe008          DCD      0xfdffe008

                          AREA ||i.SD_PowerON||, CODE, READONLY, ALIGN=2

                  SD_PowerON PROC
;;;188    SD_Error SD_PowerON(void)
;;;189    {
000000  e92d4ff8          PUSH     {r3-r11,lr}
;;;190      SD_Error errorstatus = SD_OK;
;;;191      u32 response = 0, count = 0;
000004  2400              MOVS     r4,#0
;;;192      bool validvoltage = FALSE;
;;;193      u32 SDType = SD_STD_CAPACITY;
;;;194    
;;;195      /* Power ON Sequence -------------------------------------------------------*/
;;;196      /* Configure the SDIO peripheral */
;;;197      SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; /* HCLK = 72MHz, SDIOCLK = 72MHz, SDIO_CK = HCLK/(178 + 2) = 400 KHz */
000006  486c              LDR      r0,|L4.440|
000008  21b2              MOVS     r1,#0xb2
00000a  7001              STRB     r1,[r0,#0]  ; SDIO_InitStructure
;;;198      SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising;
;;;199      SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable;
00000c  6044              STR      r4,[r0,#4]  ; SDIO_InitStructure
;;;200      SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable;
00000e  6084              STR      r4,[r0,#8]  ; SDIO_InitStructure
;;;201      SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b;
000010  60c4              STR      r4,[r0,#0xc]  ; SDIO_InitStructure
;;;202      SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable;
000012  6104              STR      r4,[r0,#0x10]  ; SDIO_InitStructure
000014  4626              MOV      r6,r4                 ;192
000016  4625              MOV      r5,r4                 ;193
000018  46a3              MOV      r11,r4                ;198
;;;203      SDIO_Init(&SDIO_InitStructure);
00001a  6144              STR      r4,[r0,#0x14]  ; SDIO_InitStructure
00001c  f7fffffe          BL       SDIO_Init
;;;204    
;;;205      /* Set Power State to ON */
;;;206      SDIO_SetPowerState(SDIO_PowerState_ON);
000020  2003              MOVS     r0,#3
000022  f7fffffe          BL       SDIO_SetPowerState
;;;207    
;;;208      /* Enable SDIO Clock */
;;;209      SDIO_ClockCmd(ENABLE);
000026  2001              MOVS     r0,#1
000028  f7fffffe          BL       SDIO_ClockCmd
;;;210    
;;;211      /* CMD0: GO_IDLE_STATE -------------------------------------------------------*/
;;;212      /* No CMD response required */
;;;213      SDIO_CmdInitStructure.SDIO_Argument = 0x0;
00002c  4f62              LDR      r7,|L4.440|
;;;214      SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_GO_IDLE_STATE;
;;;215      SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No;
;;;216      SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No;
;;;217      SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
00002e  f44f6080          MOV      r0,#0x400
000032  3718              ADDS     r7,r7,#0x18           ;213
000034  f8c7b000          STR      r11,[r7,#0]           ;214  ; SDIO_CmdInitStructure
000038  f8c7b004          STR      r11,[r7,#4]           ;215  ; SDIO_CmdInitStructure
00003c  f8c7b008          STR      r11,[r7,#8]           ;216  ; SDIO_CmdInitStructure

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