📄 wiegand.src
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LCALL ?C?COPY
; if(odd_parity(wie)) //end
; SOURCE LINE # 126
MOV DPTR,#wie?243
MOVX A,@DPTR
MOV R7,A
LCALL _odd_parity
JNC ?C0032
;
; {
; SOURCE LINE # 128
; if(chanl1==CHANL_DIN)
; SOURCE LINE # 129
MOV DPTR,#chanl1?244
MOVX A,@DPTR
CJNE A,#01H,?C0033
; {
; SOURCE LINE # 130
; D1IN=1;
; SOURCE LINE # 131
; delayus(90); //50us脉冲宽度
; SOURCE LINE # 132
LCALL L?0096
; D1IN=0;
; SOURCE LINE # 133
CLR D1IN
; }
; SOURCE LINE # 134
RET
?C0033:
; else
; {
; SOURCE LINE # 136
; D1OUT=1;
; SOURCE LINE # 137
SETB D1OUT
; delayus(90); //50us脉冲宽度
; SOURCE LINE # 138
LCALL L?0098
; D1OUT=0;
; SOURCE LINE # 139
CLR D1OUT
; }
; SOURCE LINE # 140
; }
; SOURCE LINE # 141
RET
?C0032:
; else
; {
; SOURCE LINE # 143
; if(chanl1==CHANL_DIN)
; SOURCE LINE # 144
MOV DPTR,#chanl1?244
MOVX A,@DPTR
CJNE A,#01H,?C0036
; {
; SOURCE LINE # 145
; D0IN=1;
; SOURCE LINE # 146
SETB D0IN
; delayus(90);
; SOURCE LINE # 147
LCALL L?0098
; D0IN=0;
; SOURCE LINE # 148
CLR D0IN
; }
; SOURCE LINE # 149
RET
?C0036:
; else
; {
; SOURCE LINE # 151
; D0OUT=1;
; SOURCE LINE # 152
SETB D0OUT
; delayus(90);
; SOURCE LINE # 153
LCALL L?0098
; D0OUT=0;
; SOURCE LINE # 154
CLR D0OUT
; }
; SOURCE LINE # 155
; }
; SOURCE LINE # 156
; }
; SOURCE LINE # 157
; break;
; SOURCE LINE # 158
;
; default:
; SOURCE LINE # 160
; break;
; SOURCE LINE # 161
;
; }
; SOURCE LINE # 163
;
; }
; SOURCE LINE # 165
?C0039:
RET
; END OF _wiegandout
; /***************************************************************************************
; **函数功能：wiegand data out
; **入参： wie
; **返回值： 无
; **作者： jerkoh
; **日期： 2009-06-16
; **说明： 无
; ***************************************************************************************/
; void wiedataout(unsigned char k,unsigned char chanl2)
RSEG ?PR?_wiedataout?WIEGAND
L?0099:
USING 0
L?0100:
MOV DPTR,#chanl1?244
MOVX A,@DPTR
MOV R5,A
_wiedataout:
USING 0
; SOURCE LINE # 174
MOV DPTR,#chanl2?349
MOV A,R5
MOVX @DPTR,A
;---- Variable 'k?348' assigned to Register 'R1' ----
MOV R1,AR7
; {
; SOURCE LINE # 175
; unsigned char i;
;
; for(i=0;i<8;i++)
; SOURCE LINE # 178
;---- Variable 'i?350' assigned to Register 'R3' ----
CLR A
MOV R3,A
?C0040:
; {
; SOURCE LINE # 179
; if(wiebuf[k]&0x80)
; SOURCE LINE # 180
MOV A,#LOW (wiebuf)
ADD A,R1
MOV DPL,A
CLR A
ADDC A,#HIGH (wiebuf)
MOV DPH,A
MOVX A,@DPTR
JNB ACC.7,?C0043
; {
; SOURCE LINE # 181
; if(chanl2==CHANL_DIN)
; SOURCE LINE # 182
MOV DPTR,#chanl2?349
MOVX A,@DPTR
CJNE A,#01H,?C0044
; {
; SOURCE LINE # 183
; D1IN=1;
; SOURCE LINE # 184
; delayus(90); //50us脉冲宽度
; SOURCE LINE # 185
LCALL L?0097
; D1IN=0;
; SOURCE LINE # 186
CLR D1IN
; }
; SOURCE LINE # 187
SJMP ?C0095
?C0044:
; else
; {
; SOURCE LINE # 189
; D1OUT=1;
; SOURCE LINE # 190
SETB D1OUT
; delayus(90); //50us脉冲宽度
; SOURCE LINE # 191
LCALL L?0098
; D1OUT=0;
; SOURCE LINE # 192
CLR D1OUT
; }
; SOURCE LINE # 193
?C0045:
; delayms(2); //2ms脉冲间隔
; SOURCE LINE # 194
; wiebuf[k]<<=1;
; SOURCE LINE # 195
; }
; SOURCE LINE # 196
SJMP ?C0095
?C0043:
; else
; {
; SOURCE LINE # 198
; if(chanl2==CHANL_DIN)
; SOURCE LINE # 199
MOV DPTR,#chanl2?349
MOVX A,@DPTR
CJNE A,#01H,?C0047
; {
; SOURCE LINE # 200
; D0IN=1;
; SOURCE LINE # 201
SETB D0IN
; delayus(90);
; SOURCE LINE # 202
LCALL L?0098
; D0IN=0;
; SOURCE LINE # 203
CLR D0IN
; }
; SOURCE LINE # 204
SJMP ?C0048
?C0047:
; else
; {
; SOURCE LINE # 206
; D0OUT=1;
; SOURCE LINE # 207
SETB D0OUT
; delayus(90);
; SOURCE LINE # 208
LCALL L?0098
; D0OUT=0;
; SOURCE LINE # 209
CLR D0OUT
; }
; SOURCE LINE # 210
?C0048:
; delayms(2);
; SOURCE LINE # 211
?C0095:
MOV R7,#02H
MOV R6,#00H
LCALL _delayms
; wiebuf[k]<<=1;
; SOURCE LINE # 212
MOV A,#LOW (wiebuf)
ADD A,R1
MOV DPL,A
CLR A
ADDC A,#HIGH (wiebuf)
MOV DPH,A
MOVX A,@DPTR
ADD A,ACC
MOVX @DPTR,A
; }
; SOURCE LINE # 213
; }
; SOURCE LINE # 214
?C0042:
INC R3
MOV A,R3
XRL A,#08H
JNZ ?C0040
; }
; SOURCE LINE # 215
?C0049:
RET
; END OF _wiedataout
; /***************************************************************************************
; **函数功能：Even_Parity 偶检验 前12bits or 前16bits
; **入参： wiebuf, wieformat
; **返回值： bit
; **作者： jerkoh
; **日期： 2009-06-16
; **说明： 无
; ***************************************************************************************/
; bit even_parity(unsigned char wieformat)
RSEG ?PR?_even_parity?WIEGAND
_even_parity:
USING 0
; SOURCE LINE # 224
;---- Variable 'i?452' assigned to Register 'R6' ----
;---- Variable 'j?453' assigned to Register 'R5' ----
;---- Variable 'wieformat?451' assigned to Register 'R7' ----
; {
; SOURCE LINE # 225
; unsigned char i,j;
; bit opt;
;
; if(wieformat==26)
; SOURCE LINE # 229
MOV A,R7
XRL A,#01AH
JNZ ?C0050
; {
; SOURCE LINE # 230
; for(i=0,j=0;i<8;i++)
; SOURCE LINE # 231
MOV R6,A
MOV R5,A
?C0051:
; {
; SOURCE LINE # 232
; if(wiebuf[3]&0x80)
; SOURCE LINE # 233
MOV DPTR,#wiebuf+03H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0054
; {
; SOURCE LINE # 234
; j++;
; SOURCE LINE # 235
INC R5
; }
; SOURCE LINE # 236
?C0054:
; wiebuf[3]<<=1;
; SOURCE LINE # 237
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+03H
MOVX @DPTR,A
; }
; SOURCE LINE # 238
INC R6
MOV A,R6
CJNE A,#08H,?C0051
?C0052:
; for(i=0;i<4;i++)
; SOURCE LINE # 239
CLR A
MOV R6,A
?C0055:
; {
; SOURCE LINE # 240
; if(wiebuf[4]&0x80)
; SOURCE LINE # 241
MOV DPTR,#wiebuf+04H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0058
; {
; SOURCE LINE # 242
; j++;
; SOURCE LINE # 243
INC R5
; }
; SOURCE LINE # 244
?C0058:
; wiebuf[4]<<=1;
; SOURCE LINE # 245
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+04H
MOVX @DPTR,A
; }
; SOURCE LINE # 246
INC R6
MOV A,R6
CJNE A,#04H,?C0055
SJMP ?C0059
; }
; SOURCE LINE # 247
?C0050:
; else //34
; {
; SOURCE LINE # 249
; for(i=0,j=0;i<8;i++)
; SOURCE LINE # 250
CLR A
MOV R6,A
MOV R5,A
?C0060:
; {
; SOURCE LINE # 251
; if(wiebuf[2]&0x80)
; SOURCE LINE # 252
MOV DPTR,#wiebuf+02H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0063
; {
; SOURCE LINE # 253
; j++;
; SOURCE LINE # 254
INC R5
; }
; SOURCE LINE # 255
?C0063:
; wiebuf[2]<<=1;
; SOURCE LINE # 256
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+02H
MOVX @DPTR,A
; }
; SOURCE LINE # 257
INC R6
MOV A,R6
CJNE A,#08H,?C0060
?C0061:
; for(i=0;i<8;i++)
; SOURCE LINE # 258
CLR A
MOV R6,A
?C0064:
; {
; SOURCE LINE # 259
; if(wiebuf[3]&0x80)
; SOURCE LINE # 260
MOV DPTR,#wiebuf+03H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0067
; {
; SOURCE LINE # 261
; j++;
; SOURCE LINE # 262
INC R5
; }
; SOURCE LINE # 263
?C0067:
; wiebuf[3]<<=1;
; SOURCE LINE # 264
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+03H
MOVX @DPTR,A
; }
; SOURCE LINE # 265
INC R6
MOV A,R6
CJNE A,#08H,?C0064
;
;
; }
; SOURCE LINE # 268
?C0059:
;
;
;
; if((j&0x01)==0x01) opt=1;
; SOURCE LINE # 272
MOV A,R5
JNB ACC.0,?C0068
SETB opt?454
SJMP ?C0069
?C0068:
; else opt=0;
; SOURCE LINE # 273
CLR opt?454
?C0069:
; return(opt);
; SOURCE LINE # 274
MOV C,opt?454
;
;
; }
; SOURCE LINE # 277
?C0070:
RET
; END OF _even_parity
;
;
; /***************************************************************************************
; **函数功能：Odd_Parity 奇检验 后12bits or 后16bits
; **入参： wiebuf, wieformat
; **返回值： bit
; **作者： jerkoh
; **日期： 2009-06-16
; **说明： 无
; ***************************************************************************************/
; bit odd_parity(unsigned char wieformat)
RSEG ?PR?_odd_parity?WIEGAND
_odd_parity:
USING 0
; SOURCE LINE # 288
;---- Variable 'i?556' assigned to Register 'R6' ----
;---- Variable 'j?557' assigned to Register 'R5' ----
;---- Variable 'wieformat?555' assigned to Register 'R7' ----
; {
; SOURCE LINE # 289
; unsigned char i,j;
; bit opt;
;
; if(wieformat==26)
; SOURCE LINE # 293
MOV A,R7
XRL A,#01AH
JNZ ?C0071
; {
; SOURCE LINE # 294
; wiebuf[4]<<=4; //先左移4位
; SOURCE LINE # 295
MOV DPTR,#wiebuf+04H
MOVX A,@DPTR
SWAP A
ANL A,#0F0H
MOVX @DPTR,A
;
; for(i=0,j=0;i<4;i++)
; SOURCE LINE # 297
CLR A
MOV R6,A
MOV R5,A
?C0072:
; {
; SOURCE LINE # 298
; if(wiebuf[4]&0x80)
; SOURCE LINE # 299
MOV DPTR,#wiebuf+04H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0075
; {
; SOURCE LINE # 300
; j++;
; SOURCE LINE # 301
INC R5
; }
; SOURCE LINE # 302
?C0075:
; wiebuf[4]<<=1;
; SOURCE LINE # 303
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+04H
MOVX @DPTR,A
; }
; SOURCE LINE # 304
INC R6
MOV A,R6
CJNE A,#04H,?C0072
?C0073:
; for(i=0;i<8;i++)
; SOURCE LINE # 305
CLR A
MOV R6,A
?C0076:
; {
; SOURCE LINE # 306
; if(wiebuf[5]&0x80)
; SOURCE LINE # 307
MOV DPTR,#wiebuf+05H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0079
; {
; SOURCE LINE # 308
; j++;
; SOURCE LINE # 309
INC R5
; }
; SOURCE LINE # 310
?C0079:
; wiebuf[5]<<=1;
; SOURCE LINE # 311
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+05H
MOVX @DPTR,A
; }
; SOURCE LINE # 312
INC R6
MOV A,R6
CJNE A,#08H,?C0076
SJMP ?C0080
; }
; SOURCE LINE # 313
?C0071:
; else //34
; {
; SOURCE LINE # 315
; for(i=0,j=0;i<8;i++)
; SOURCE LINE # 316
CLR A
MOV R6,A
MOV R5,A
?C0081:
; {
; SOURCE LINE # 317
; if(wiebuf[4]&0x80)
; SOURCE LINE # 318
MOV DPTR,#wiebuf+04H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0084
; {
; SOURCE LINE # 319
; j++;
; SOURCE LINE # 320
INC R5
; }
; SOURCE LINE # 321
?C0084:
; wiebuf[4]<<=1;
; SOURCE LINE # 322
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+04H
MOVX @DPTR,A
; }
; SOURCE LINE # 323
INC R6
MOV A,R6
CJNE A,#08H,?C0081
?C0082:
; for(i=0;i<8;i++)
; SOURCE LINE # 324
CLR A
MOV R6,A
?C0085:
; {
; SOURCE LINE # 325
; if(wiebuf[5]&0x80)
; SOURCE LINE # 326
MOV DPTR,#wiebuf+05H
MOVX A,@DPTR
MOV R7,A
JNB ACC.7,?C0088
; {
; SOURCE LINE # 327
; j++;
; SOURCE LINE # 328
INC R5
; }
; SOURCE LINE # 329
?C0088:
; wiebuf[5]<<=1;
; SOURCE LINE # 330
MOV A,R7
ADD A,ACC
MOV DPTR,#wiebuf+05H
MOVX @DPTR,A
; }
; SOURCE LINE # 331
INC R6
MOV A,R6
CJNE A,#08H,?C0085
;
;
; }
; SOURCE LINE # 334
?C0080:
;
;
;
; if((j&0x01)==0x01) opt=0;
; SOURCE LINE # 338
MOV A,R5
JNB ACC.0,?C0089
CLR opt?558
SJMP ?C0090
?C0089:
; else opt=1;
; SOURCE LINE # 339
SETB opt?558
?C0090:
; return(opt);
; SOURCE LINE # 340
MOV C,opt?558
;
;
;
; }
; SOURCE LINE # 344
?C0091:
RET
; END OF _odd_parity
END
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