📄 main.ls1
字号:
00A3 220 SPI0DAT DATA 0A3H
00BD 221 ADC0 DATA 0BDH
00EA 222 AD0CM2 BIT 0E8H.2
00EB 223 AD0WINT BIT 0E8H.3
00EC 224 AD0BUSY BIT 0E8H.4
00D0 225 PSW DATA 0D0H
00D8 226 CCF0 BIT 0D8H.0
009A 227 RB80 BIT 098H.2
00B7 228 FLKEY DATA 0B7H
00D9 229 CCF1 BIT 0D8H.1
230 ?PR?main?MAIN SEGMENT CODE
231 ?XD?main?MAIN SEGMENT XDATA OVERLAYABLE
232 ?PR?PORT_Init?MAIN SEGMENT CODE
233 ?PR?_Beef?MAIN SEGMENT CODE
234 ?XD?_Beef?MAIN SEGMENT XDATA OVERLAYABLE
235 ?PR?_BeefL?MAIN SEGMENT CODE
236 ?XD?_BeefL?MAIN SEGMENT XDATA OVERLAYABLE
237 ?PR?SYSCLK_Init?MAIN SEGMENT CODE
238 ?PR?_delay?MAIN SEGMENT CODE
239 ?PR?PCA_Init?MAIN SEGMENT CODE
240 ?PR?PCA_ISR?MAIN SEGMENT CODE
241 ?PR?relay_work?MAIN SEGMENT CODE
242 ?CO?MAIN SEGMENT CODE
243 EXTRN BIT (wie_str)
244 EXTRN XDATA (wiebuf)
245 EXTRN CODE (ia442xinit)
246 EXTRN BIT (TRIG_STATE)
247 EXTRN XDATA (tagnr)
248 EXTRN IDATA (wie_8bit)
249 EXTRN CODE (process_uart)
250 EXTRN XDATA (wiebuf_cout)
251 EXTRN IDATA (event_relay)
252 EXTRN CODE (flash_boot)
253 EXTRN CODE (Timer0_Init)
254 EXTRN CODE (_Timer2_Init)
255 EXTRN CODE (spirevtwobyte)
256 EXTRN CODE (_txregframe)
A51 MACRO ASSEMBLER MAIN 08/03/2009 16:59:01 PAGE 5
257 EXTRN CODE (AnalyseFrame)
258 EXTRN XDATA (event_word)
259 EXTRN CODE (_Printf_String)
260 EXTRN CODE (_Printf_Char)
261 EXTRN CODE (_AT25_ReadArray)
262 EXTRN CODE (_spisendcommand)
263 EXTRN IDATA (wie_cout)
264 EXTRN CODE (UART0_Init)
265 EXTRN CODE (receive)
266 EXTRN CODE (_AT25_WritePage)
267 EXTRN CODE (_delayms)
268 EXTRN CODE (_SeekFrame)
269 EXTRN IDATA (RELAY_TRIG_STATE)
270 EXTRN CODE (_Init_AT25XXX)
271 EXTRN CODE (?C_STARTUP)
272 EXTRN CODE (?C?MEMSET)
273 PUBLIC relay_work
274 PUBLIC PCA_ISR
275 PUBLIC PCA_Init
276 PUBLIC _delay
277 PUBLIC SYSCLK_Init
278 PUBLIC _BeefL
279 PUBLIC _Beef
280 PUBLIC PORT_Init
281 PUBLIC main
282
---- 283 RSEG ?XD?main?MAIN
0000 284 ?main?BYTE:
0000 285 nr?040: DS 1
0001 286 ORG 1
0001 287 event_word_copy?041: DS 2
288
---- 289 RSEG ?XD?_BeefL?MAIN
0000 290 ?_BeefL?BYTE:
0000 291 be?345: DS 1
0001 292 ORG 1
0001 293 RG?346: DS 1
0002 294 ORG 2
0002 295 i?347: DS 1
296
---- 297 RSEG ?XD?_Beef?MAIN
0000 298 ?_Beef?BYTE:
0000 299 be?242: DS 1
0001 300 ORG 1
0001 301 RG?243: DS 1
0002 302 ORG 2
0002 303 i?244: DS 1
304
---- 305 RSEG ?CO?MAIN
0000 306 ?SC_0:
0000 0D0A5B6D 307 DB 00DH,00AH,'[' ,'m' ,'s' ,'g' ,':' ,']' ,'C' ,'o'
0004 73673A5D
0008 436F
000A 70797269 308 DB 'p' ,'y' ,'r' ,'i' ,'g' ,'h' ,'t' ,'(' ,'c' ,')'
000E 67687428
0012 6329
0014 20534B45 309 DB ' ' ,'S' ,'K' ,'E' ,'E' ,' ' ,'L' ,'T' ,'D' ,','
0018 45204C54
001C 442C
001E 2E434F2E 310 DB '.' ,'C' ,'O' ,'.' ,' ' ,'1' ,'9' ,'9' ,'6' ,'-'
0022 20313939
0026 362D
0028 32303039 311 DB '2' ,'0' ,'0' ,'9' ,000H
002C 00
312
002D 313 ?SC_45:
A51 MACRO ASSEMBLER MAIN 08/03/2009 16:59:01 PAGE 6
002D 0D0A5B6D 314 DB 00DH,00AH,'[' ,'m' ,'s' ,'g' ,':' ,']' ,'E' ,'Z'
0031 73673A5D
0035 455A
0037 72616469 315 DB 'r' ,'a' ,'d' ,'i' ,'o' ,' ' ,'S' ,'I' ,'4' ,'4'
003B 6F205349
003F 3434
0041 32312834 316 DB '2' ,'1' ,'(' ,'4' ,'3' ,'3' ,'M' ,')' ,' ' ,'R'
0045 33334D29
0049 2052
004B 756E6E69 317 DB 'u' ,'n' ,'n' ,'i' ,'n' ,'g' ,' ' ,'o' ,'n' ,' '
004F 6E67206F
0053 6E20
0055 43383035 318 DB 'C' ,'8' ,'0' ,'5' ,'1' ,'F' ,'3' ,'1' ,'0' ,000H
0059 31463331
005D 3000
319
320 ; /******************************************************************************
321 ; ** copyright(c) skee ltd,.co. 1996-2009
322 ; ** c8051f310 256+1024 bytes ram 使用内部晶振24.5M
323 ; ** RFchip si4421(433M)
324 ; ** Last Modify 2009-08-03
325 ; ** by jerkoh
326 ; ** V8.03
327 ; ******************************************************************************/
328 ;
329 ; #include "global.h"
330 ;
331 ; #ifndef TEST
332 ; #define TEST
333 ; #endif
334 ;
335 ;
336 ;
337 ; /******************************************************************************
338 ; ** MAIN Routine
339 ; ******************************************************************************/
340 ;
341 ; void main (void)
342
---- 343 RSEG ?PR?main?MAIN
0000 344 main:
345 USING 0
346 ; SOURCE LINE # 22
347 ; {
348 ; SOURCE LINE # 23
349 ;
350 ; unsigned char nr;
351 ; unsigned int event_word_copy;
352 ;
353 ; // Disable Watchdog timer
354 ; PCA0MD &= ~0x40; // WDTE = 0 (clear watchdog timer
355 ; SOURCE LINE # 29
0000 53D9BF 356 ANL PCA0MD,#0BFH
357 ; // enable)
358 ; PORT_Init(); // Initialize Port I/O
359 ; SOURCE LINE # 31
0003 120000 F 360 LCALL PORT_Init
361 ; SYSCLK_Init ();
362 ; SOURCE LINE # 32
0006 120000 F 363 LCALL SYSCLK_Init
364 ; // Initialize Oscillator
365 ;
366 ; event_word=0;
367 ; SOURCE LINE # 35
0009 E4 368 CLR A
000A 900000 F 369 MOV DPTR,#event_word
A51 MACRO ASSEMBLER MAIN 08/03/2009 16:59:01 PAGE 7
000D F0 370 MOVX @DPTR,A
000E A3 371 INC DPTR
000F F0 372 MOVX @DPTR,A
373 ;
374 ; delayms(200);
375 ; SOURCE LINE # 37
0010 7FC8 376 MOV R7,#0C8H
0012 FE 377 MOV R6,A
0013 120000 F 378 LCALL _delayms
379 ; Timer0_Init();
380 ; SOURCE LINE # 38
0016 120000 F 381 LCALL Timer0_Init
382 ; Timer2_Init(SYSCLK/TIMER2_RATE); // Init Timer 2
383 ; SOURCE LINE # 39
0019 7FB4 384 MOV R7,#0B4H
001B 7E5F 385 MOV R6,#05FH
001D 120000 F 386 LCALL _Timer2_Init
387 ;
388 ; PCA_Init ();
389 ; SOURCE LINE # 41
0020 120000 F 390 LCALL PCA_Init
391 ;
392 ;
393 ; Beef(2,RED); //上电2闪2滴
394 ; SOURCE LINE # 44
0023 7D01 395 MOV R5,#01H
0025 7F02 396 MOV R7,#02H
0027 120000 F 397 LCALL _Beef
398 ; delayms(500);
399 ; SOURCE LINE # 45
002A 7FF4 400 MOV R7,#0F4H
002C 7E01 401 MOV R6,#01H
002E 120000 F 402 LCALL _delayms
403 ; BeefL(1,RED);
404 ; SOURCE LINE # 46
0031 7D01 405 MOV R5,#01H
0033 7F01 406 MOV R7,#01H
0035 120000 F 407 LCALL _BeefL
408 ; delayms(500);
409 ; SOURCE LINE # 47
0038 7FF4 410 MOV R7,#0F4H
003A 7E01 411 MOV R6,#01H
003C 120000 F 412 LCALL _delayms
413 ;
414 ; LEDR_ON;
415 ; SOURCE LINE # 49
003F C282 416 CLR LEDR
0041 D283 417 SETB LEDG
418 ; LEDG_OFF;
419 ; SOURCE LINE # 50
0043 D283 420 SETB LEDG
421 ; flash_boot(); //flash参数启动检验提取
422 ; SOURCE LINE # 51
0045 120000 F 423 LCALL flash_boot
424 ;
425 ;
426 ;
427 ; UART0_Init();
428 ; SOURCE LINE # 55
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