arm-linux-objdump.1

arm-linux.rar

.IP "\fB\-\-headers\fR" 4
.IX Item "--headers"
.PD
Display summary information from the section headers of the
object file.
.Sp
File segments may be relocated to nonstandard addresses, for example by
using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to
\&\fBld\fR.  However, some object file formats, such as a.out, do not
store the starting address of the file segments.  In those situations,
although \fBld\fR relocates the sections correctly, using \fBobjdump
\&\-h\fR to list the file section headers cannot show the correct addresses.
Instead, it shows the usual addresses, which are implicit for the
target.
.IP "\fB\-H\fR" 4
.IX Item "-H"
.PD 0
.IP "\fB\-\-help\fR" 4
.IX Item "--help"
.PD
Print a summary of the options to \fBobjdump\fR and exit.
.IP "\fB\-i\fR" 4
.IX Item "-i"
.PD 0
.IP "\fB\-\-info\fR" 4
.IX Item "--info"
.PD
Display a list showing all architectures and object formats available
for specification with \fB\-b\fR or \fB\-m\fR.
.IP "\fB\-j\fR \fIname\fR" 4
.IX Item "-j name"
.PD 0
.IP "\fB\-\-section=\fR\fIname\fR" 4
.IX Item "--section=name"
.PD
Display information only for section \fIname\fR.
.IP "\fB\-l\fR" 4
.IX Item "-l"
.PD 0
.IP "\fB\-\-line\-numbers\fR" 4
.IX Item "--line-numbers"
.PD
Label the display (using debugging information) with the filename and
source line numbers corresponding to the object code or relocs shown.
Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR.
.IP "\fB\-m\fR \fImachine\fR" 4
.IX Item "-m machine"
.PD 0
.IP "\fB\-\-architecture=\fR\fImachine\fR" 4
.IX Item "--architecture=machine"
.PD
Specify the architecture to use when disassembling object files.  This
can be useful when disassembling object files which do not describe
architecture information, such as S\-records.  You can list the available
architectures with the \fB\-i\fR option.
.IP "\fB\-M\fR \fIoptions\fR" 4
.IX Item "-M options"
.PD 0
.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4
.IX Item "--disassembler-options=options"
.PD
Pass target specific information to the disassembler.  Only supported on
some targets.  If it is necessary to specify more than one
disassembler option then multiple \fB\-M\fR options can be used or
can be placed together into a comma separated list.
.Sp
If the target is an \s-1ARM\s0 architecture then this switch can be used to
select which register name set is used during disassembler.  Specifying
\&\fB\-M reg-name-std\fR (the default) will select the register names as
used in \s-1ARM\s0's instruction set documentation, but with register 13 called
\&'sp', register 14 called 'lr' and register 15 called 'pc'.  Specifying
\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0
Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will
just use \fBr\fR followed by the register number.
.Sp
There are also two variants on the \s-1APCS\s0 register naming scheme enabled
by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which
use the ARM/Thumb Procedure Call Standard naming conventions.  (Either
with the normal register names or the special register names).
.Sp
This option can also be used for \s-1ARM\s0 architectures to force the
disassembler to interpret all instructions as Thumb instructions by
using the switch \fB\-\-disassembler\-options=force\-thumb\fR.  This can be
useful when attempting to disassemble thumb code produced by other
compilers.
.Sp
For the x86, some of the options duplicate functions of the \fB\-m\fR
switch, but allow finer grained control.  Multiple selections from the
following may be specified as a comma separated string.
\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for
the given architecture.  \fBintel\fR and \fBatt\fR select between
intel syntax mode and \s-1AT&T\s0 syntax mode.  \fBaddr32\fR,
\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default
address size and operand size.  These four options will be overridden if
\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the
option string.  Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode,
instructs the disassembler to print a mnemonic suffix even when the
suffix could be inferred by the operands.
.Sp
For \s-1PPC\s0, \fBbooke\fR, \fBbooke32\fR and \fBbooke64\fR select
disassembly of BookE instructions.  \fB32\fR and \fB64\fR select
PowerPC and PowerPC64 disassembly, respectively.
.Sp
For \s-1MIPS\s0, this option controls the printing of instruction mneumonic
names and register names in disassembled instructions.  Multiple
selections from the following may be specified as a comma separated
string, and invalid options are ignored:
.RS 4
.ie n .IP """no\-aliases""" 4
.el .IP "\f(CWno\-aliases\fR" 4
.IX Item "no-aliases"
Print the 'raw' instruction mneumonic instead of some pseudo
instruction mneumonic.  I.E. print 'daddu' or 'or' instead of 'move',
\&'sll' instead of 'nop', etc.
.ie n .IP """gpr\-names=\f(CI\s-1ABI\s0\f(CW""" 4
.el .IP "\f(CWgpr\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
.IX Item "gpr-names=ABI"
Print \s-1GPR\s0 (general\-purpose register) names as appropriate
for the specified \s-1ABI\s0.  By default, \s-1GPR\s0 names are selected according to
the \s-1ABI\s0 of the binary being disassembled.
.ie n .IP """fpr\-names=\f(CI\s-1ABI\s0\f(CW""" 4
.el .IP "\f(CWfpr\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
.IX Item "fpr-names=ABI"
Print \s-1FPR\s0 (floating\-point register) names as
appropriate for the specified \s-1ABI\s0.  By default, \s-1FPR\s0 numbers are printed
rather than names.
.ie n .IP """cp0\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
.el .IP "\f(CWcp0\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
.IX Item "cp0-names=ARCH"
Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names
as appropriate for the \s-1CPU\s0 or architecture specified by
\&\fI\s-1ARCH\s0\fR.  By default, \s-1CP0\s0 register names are selected according to
the architecture and \s-1CPU\s0 of the binary being disassembled.
.ie n .IP """hwr\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
.el .IP "\f(CWhwr\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
.IX Item "hwr-names=ARCH"
Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names
as appropriate for the \s-1CPU\s0 or architecture specified by
\&\fI\s-1ARCH\s0\fR.  By default, \s-1HWR\s0 names are selected according to
the architecture and \s-1CPU\s0 of the binary being disassembled.
.ie n .IP """reg\-names=\f(CI\s-1ABI\s0\f(CW""" 4
.el .IP "\f(CWreg\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
.IX Item "reg-names=ABI"
Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0.
.ie n .IP """reg\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
.el .IP "\f(CWreg\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
.IX Item "reg-names=ARCH"
Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names)
as appropriate for the selected \s-1CPU\s0 or architecture.
.RE
.RS 4
.Sp
For any of the options listed above, \fI\s-1ABI\s0\fR or
\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed
rather than names, for the selected types of registers.
You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using
the \fB\-\-help\fR option.
.RE
.IP "\fB\-p\fR" 4
.IX Item "-p"
.PD 0
.IP "\fB\-\-private\-headers\fR" 4
.IX Item "--private-headers"
.PD
Print information that is specific to the object file format.  The exact
information printed depends upon the object file format.  For some
object file formats, no additional information is printed.
.IP "\fB\-r\fR" 4
.IX Item "-r"
.PD 0
.IP "\fB\-\-reloc\fR" 4
.IX Item "--reloc"
.PD
Print the relocation entries of the file.  If used with \fB\-d\fR or
\&\fB\-D\fR, the relocations are printed interspersed with the
disassembly.
.IP "\fB\-R\fR" 4
.IX Item "-R"
.PD 0
.IP "\fB\-\-dynamic\-reloc\fR" 4
.IX Item "--dynamic-reloc"
.PD
Print the dynamic relocation entries of the file.  This is only
meaningful for dynamic objects, such as certain types of shared
libraries.
.IP "\fB\-s\fR" 4
.IX Item "-s"
.PD 0
.IP "\fB\-\-full\-contents\fR" 4
.IX Item "--full-contents"
.PD
Display the full contents of any sections requested.  By default all
non-empty sections are displayed.
.IP "\fB\-S\fR" 4
.IX Item "-S"
.PD 0
.IP "\fB\-\-source\fR" 4
.IX Item "--source"
.PD
Display source code intermixed with disassembly, if possible.  Implies
\&\fB\-d\fR.
.IP "\fB\-\-show\-raw\-insn\fR" 4
.IX Item "--show-raw-insn"
When disassembling instructions, print the instruction in hex as well as
in symbolic form.  This is the default except when
\&\fB\-\-prefix\-addresses\fR is used.
.IP "\fB\-\-no\-show\-raw\-insn\fR" 4
.IX Item "--no-show-raw-insn"
When disassembling instructions, do not print the instruction bytes.
This is the default when \fB\-\-prefix\-addresses\fR is used.
.IP "\fB\-G\fR" 4
.IX Item "-G"
.PD 0
.IP "\fB\-\-stabs\fR" 4
.IX Item "--stabs"
.PD
Display the full contents of any sections requested.  Display the
contents of the .stab and .stab.index and .stab.excl sections from an
\&\s-1ELF\s0 file.  This is only useful on systems (such as Solaris 2.0) in which
\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0
section.  In most other file formats, debugging symbol-table entries are
interleaved with linkage symbols, and are visible in the \fB\-\-syms\fR
output.
.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4
.IX Item "--start-address=address"
Start displaying data at the specified address.  This affects the output
of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4
.IX Item "--stop-address=address"
Stop displaying data at the specified address.  This affects the output
of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
.IP "\fB\-t\fR" 4
.IX Item "-t"
.PD 0
.IP "\fB\-\-syms\fR" 4
.IX Item "--syms"
.PD
Print the symbol table entries of the file.
This is similar to the information provided by the \fBnm\fR program.
.IP "\fB\-T\fR" 4
.IX Item "-T"
.PD 0
.IP "\fB\-\-dynamic\-syms\fR" 4
.IX Item "--dynamic-syms"
.PD
Print the dynamic symbol table entries of the file.  This is only
meaningful for dynamic objects, such as certain types of shared
libraries.  This is similar to the information provided by the \fBnm\fR
program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option.
.IP "\fB\-\-special\-syms\fR" 4
.IX Item "--special-syms"
When displaying symbols include those which the target considers to be
special in some way and which would not normally be of interest to the
user.
.IP "\fB\-V\fR" 4
.IX Item "-V"
.PD 0
.IP "\fB\-\-version\fR" 4
.IX Item "--version"
.PD
Print the version number of \fBobjdump\fR and exit.
.IP "\fB\-x\fR" 4
.IX Item "-x"
.PD 0
.IP "\fB\-\-all\-headers\fR" 4
.IX Item "--all-headers"
.PD
Display all available header information, including the symbol table and
relocation entries.  Using \fB\-x\fR is equivalent to specifying all of
\&\fB\-a \-f \-h \-p \-r \-t\fR.
.IP "\fB\-w\fR" 4
.IX Item "-w"
.PD 0
.IP "\fB\-\-wide\fR" 4
.IX Item "--wide"
.PD
Format some lines for output devices that have more than 80 columns.
Also do not truncate symbol names when they are displayed.
.IP "\fB\-z\fR" 4
.IX Item "-z"
.PD 0
.IP "\fB\-\-disassemble\-zeroes\fR" 4
.IX Item "--disassemble-zeroes"
.PD
Normally the disassembly output will skip blocks of zeroes.  This
option directs the disassembler to disassemble those blocks, just like
any other data.
.SH "SEE ALSO"
.IX Header "SEE ALSO"
\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
.SH "COPYRIGHT"
.IX Header "COPYRIGHT"
Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
.PP
Permission is granted to copy, distribute and/or modify this document
under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1
or any later version published by the Free Software Foundation;
with no Invariant Sections, with no Front-Cover Texts, and with no
Back-Cover Texts.  A copy of the license is included in the
section entitled ``\s-1GNU\s0 Free Documentation License''.